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Rev Log message Author Age Path
36 added generic andor_mux unneback 4018d 04h /
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4018d 15h /
34 added vl_mux2_andor and vl_mux3_andor unneback 4018d 15h /
33 updated wb3wb3_bridge unneback 4031d 17h /
32 added vl_pll for ALTERA (cycloneIII) unneback 4039d 03h /
31 sync FIFO updated unneback 4058d 22h /
30 updated counter for level1 and level2 function unneback 4058d 23h /
29 updated counter for level1 and level2 function unneback 4058d 23h /
28 added sync simplex FIFO unneback 4060d 00h /
27 added sync simplex FIFO unneback 4060d 00h /
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4060d 01h /
25 added sync FIFO unneback 4060d 15h /
24 added vl_dff_ce_set unneback 4061d 22h /
23 fixed port map error in async fifo 1r1w unneback 4062d 13h /
22 added binary counters unneback 4062d 18h /
21 reg -> wire in and or mux in logic unneback 4063d 14h /
20 naming convention vl_ unneback 4065d 01h /
19 naming convention vl_ unneback 4065d 01h /
18 naming convention vl_ unneback 4065d 01h /
17 unneback 4128d 15h /

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