OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] - Rev 46

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
46 updated parity unneback 4197d 10h /
45 updated timing in io models unneback 4199d 05h /
44 added target independet IO functionns unneback 4202d 04h /
43 added logic for parity generation and check unneback 4206d 08h /
42 updated mux_andor unneback 4210d 07h /
41 typo in registers.v unneback 4210d 09h /
40 new build environment with custom.v added as a result file unneback 4210d 09h /
39 added simple port prio based wb arbiter unneback 4211d 06h /
38 updated andor mux unneback 4211d 06h /
37 corrected polynom with length 20 unneback 4217d 03h /
36 added generic andor_mux unneback 4218d 11h /
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4218d 22h /
34 added vl_mux2_andor and vl_mux3_andor unneback 4218d 22h /
33 updated wb3wb3_bridge unneback 4232d 00h /
32 added vl_pll for ALTERA (cycloneIII) unneback 4239d 10h /
31 sync FIFO updated unneback 4259d 06h /
30 updated counter for level1 and level2 function unneback 4259d 06h /
29 updated counter for level1 and level2 function unneback 4259d 06h /
28 added sync simplex FIFO unneback 4260d 07h /
27 added sync simplex FIFO unneback 4260d 07h /
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4260d 09h /
25 added sync FIFO unneback 4260d 22h /
24 added vl_dff_ce_set unneback 4262d 06h /
23 fixed port map error in async fifo 1r1w unneback 4262d 21h /
22 added binary counters unneback 4263d 02h /
21 reg -> wire in and or mux in logic unneback 4263d 22h /
20 naming convention vl_ unneback 4265d 09h /
19 naming convention vl_ unneback 4265d 09h /
18 naming convention vl_ unneback 4265d 09h /
17 unneback 4328d 22h /

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.