OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] - Rev 84

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
84 wb ram unneback 4600d 17h /
83 new BE_RAM unneback 4601d 05h /
82 read changed to comb unneback 4602d 02h /
81 read changed to comb unneback 4602d 03h /
80 avalon read write unneback 4604d 22h /
79 avalon read write unneback 4604d 23h /
78 default to length = 1 unneback 4605d 00h /
77 bridge update unneback 4605d 01h /
76 dependency for wb3 to avalon bus unneback 4605d 04h /
75 added wb to avalon bridge unneback 4605d 04h /
74 added abckend file for async set reset dff unneback 4612d 23h /
73 no arbiter in wb_b3_ram_be unneback 4613d 02h /
72 no arbiter in wb_b3_ram_be unneback 4613d 02h /
71 no arbiter in wb_b3_ram_be unneback 4613d 02h /
70 no arbiter in wb_b3_ram_be unneback 4613d 02h /
69 no arbiter in wb_b3_ram_be unneback 4613d 02h /
68 ram_be updated to optional mem_size unneback 4613d 02h /
67 support up to 8 wbm on arbiter unneback 4614d 02h /
66 RAM_BE ack_o vector unneback 4652d 01h /
65 RAM_BE system verilog version unneback 4652d 02h /
64 SPR reset value unneback 4652d 02h /
63 WB_B3_RAM_BE updates, bte port map + define dependency unneback 4652d 02h /
62 WB_B3_RAM_BE updates, bte port map + define dependency unneback 4652d 02h /
61 WB_B3_RAM_BE updates, bte port map + define dependency unneback 4652d 03h /
60 added wb b3 byte enable memory, added test in makefile through icarus, typo in latch fixed unneback 4653d 22h /
59 added WB RAM B3 with byte enable unneback 4654d 22h /
58 corrected EXT unit, rewrite of FF1, FL1 unneback 4671d 05h /
57 corrected EXT unit, rewrite of FF1, FL1 unneback 4671d 05h /
56 WB B4 RAM we fix unneback 4683d 21h /
55 added WB_B4RAM with byte enable unneback 4686d 04h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.