URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] - Rev 33

Rev	Log message	Author	Age	Path
33	updated wb3wb3_bridge	unneback	4849d 18h	/versatile_library
32	added vl_pll for ALTERA (cycloneIII)	unneback	4857d 04h	/versatile_library
31	sync FIFO updated	unneback	4877d 00h	/versatile_library
30	updated counter for level1 and level2 function	unneback	4877d 00h	/versatile_library
29	updated counter for level1 and level2 function	unneback	4877d 00h	/versatile_library
28	added sync simplex FIFO	unneback	4878d 01h	/versatile_library
27	added sync simplex FIFO	unneback	4878d 01h	/versatile_library
26	typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q	unneback	4878d 03h	/versatile_library
25	added sync FIFO	unneback	4878d 16h	/versatile_library
24	added vl_dff_ce_set	unneback	4880d 00h	/versatile_library
23	fixed port map error in async fifo 1r1w	unneback	4880d 14h	/versatile_library
22	added binary counters	unneback	4880d 20h	/versatile_library
21	reg -> wire in and or mux in logic	unneback	4881d 16h	/versatile_library
20	naming convention vl_	unneback	4883d 03h	/versatile_library
19	naming convention vl_	unneback	4883d 03h	/versatile_library
18	naming convention vl_	unneback	4883d 03h	/versatile_library
17		unneback	4946d 16h	/versatile_library
16	converting utility for ROM	unneback	4947d 03h	/versatile_library
15	added delay line	unneback	4953d 00h	/versatile_library
14	reg -> wire for various signals	unneback	4953d 05h	/versatile_library