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[/] [versatile_library/] [trunk/] [rtl/] - Rev 25

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Rev Log message Author Age Path
25 added sync FIFO unneback 4054d 10h /versatile_library/trunk/rtl/
24 added vl_dff_ce_set unneback 4055d 18h /versatile_library/trunk/rtl/
23 fixed port map error in async fifo 1r1w unneback 4056d 08h /versatile_library/trunk/rtl/
22 added binary counters unneback 4056d 14h /versatile_library/trunk/rtl/
21 reg -> wire in and or mux in logic unneback 4057d 10h /versatile_library/trunk/rtl/
18 naming convention vl_ unneback 4058d 21h /versatile_library/trunk/rtl/
17 unneback 4122d 10h /versatile_library/trunk/rtl/
15 added delay line unneback 4128d 18h /versatile_library/trunk/rtl/
14 reg -> wire for various signals unneback 4128d 23h /versatile_library/trunk/rtl/
13 cosmetic update unneback 4129d 01h /versatile_library/trunk/rtl/
12 added wishbone comliant modules unneback 4129d 21h /versatile_library/trunk/rtl/
11 async fifo simplex unneback 4130d 11h /versatile_library/trunk/rtl/
10 added dff_ce_clear unneback 4132d 10h /versatile_library/trunk/rtl/
8 added dff_ce_clear unneback 4132d 10h /versatile_library/trunk/rtl/
7 mem update unneback 4132d 11h /versatile_library/trunk/rtl/
6 added library files unneback 4145d 12h /versatile_library/trunk/rtl/
5 memories added unneback 4145d 12h /versatile_library/trunk/rtl/
4 added counters unneback 4149d 16h /versatile_library/trunk/rtl/
3 various updates
counter added
unneback 4152d 11h /versatile_library/trunk/rtl/
2 initial check-in unneback 4153d 12h /versatile_library/trunk/rtl/

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