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[/] [versatile_library/] [trunk/] [rtl/] - Rev 34

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Rev Log message Author Age Path
34 added vl_mux2_andor and vl_mux3_andor unneback 3482d 04h /versatile_library/trunk/rtl/
33 updated wb3wb3_bridge unneback 3495d 06h /versatile_library/trunk/rtl/
32 added vl_pll for ALTERA (cycloneIII) unneback 3502d 16h /versatile_library/trunk/rtl/
31 sync FIFO updated unneback 3522d 11h /versatile_library/trunk/rtl/
30 updated counter for level1 and level2 function unneback 3522d 11h /versatile_library/trunk/rtl/
29 updated counter for level1 and level2 function unneback 3522d 12h /versatile_library/trunk/rtl/
28 added sync simplex FIFO unneback 3523d 13h /versatile_library/trunk/rtl/
27 added sync simplex FIFO unneback 3523d 13h /versatile_library/trunk/rtl/
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 3523d 14h /versatile_library/trunk/rtl/
25 added sync FIFO unneback 3524d 04h /versatile_library/trunk/rtl/
24 added vl_dff_ce_set unneback 3525d 11h /versatile_library/trunk/rtl/
23 fixed port map error in async fifo 1r1w unneback 3526d 02h /versatile_library/trunk/rtl/
22 added binary counters unneback 3526d 07h /versatile_library/trunk/rtl/
21 reg -> wire in and or mux in logic unneback 3527d 03h /versatile_library/trunk/rtl/
18 naming convention vl_ unneback 3528d 14h /versatile_library/trunk/rtl/
17 unneback 3592d 04h /versatile_library/trunk/rtl/
15 added delay line unneback 3598d 12h /versatile_library/trunk/rtl/
14 reg -> wire for various signals unneback 3598d 17h /versatile_library/trunk/rtl/
13 cosmetic update unneback 3598d 18h /versatile_library/trunk/rtl/
12 added wishbone comliant modules unneback 3599d 14h /versatile_library/trunk/rtl/

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