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[/] [versatile_library/] [trunk/] [rtl/] - Rev 51

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Rev Log message Author Age Path
51 added WB_B4RAM with byte enable unneback 4686d 03h /versatile_library/trunk/rtl/
50 added WB_B4RAM with byte enable unneback 4686d 03h /versatile_library/trunk/rtl/
49 added WB_B4RAM with byte enable unneback 4686d 03h /versatile_library/trunk/rtl/
48 wb updated unneback 4692d 21h /versatile_library/trunk/rtl/
46 updated parity unneback 4789d 02h /versatile_library/trunk/rtl/
45 updated timing in io models unneback 4790d 20h /versatile_library/trunk/rtl/
44 added target independet IO functionns unneback 4793d 20h /versatile_library/trunk/rtl/
43 added logic for parity generation and check unneback 4797d 23h /versatile_library/trunk/rtl/
42 updated mux_andor unneback 4801d 23h /versatile_library/trunk/rtl/
41 typo in registers.v unneback 4802d 00h /versatile_library/trunk/rtl/
40 new build environment with custom.v added as a result file unneback 4802d 01h /versatile_library/trunk/rtl/
39 added simple port prio based wb arbiter unneback 4802d 22h /versatile_library/trunk/rtl/
38 updated andor mux unneback 4802d 22h /versatile_library/trunk/rtl/
37 corrected polynom with length 20 unneback 4808d 18h /versatile_library/trunk/rtl/
36 added generic andor_mux unneback 4810d 03h /versatile_library/trunk/rtl/
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4810d 14h /versatile_library/trunk/rtl/
34 added vl_mux2_andor and vl_mux3_andor unneback 4810d 14h /versatile_library/trunk/rtl/
33 updated wb3wb3_bridge unneback 4823d 16h /versatile_library/trunk/rtl/
32 added vl_pll for ALTERA (cycloneIII) unneback 4831d 02h /versatile_library/trunk/rtl/
31 sync FIFO updated unneback 4850d 21h /versatile_library/trunk/rtl/
30 updated counter for level1 and level2 function unneback 4850d 21h /versatile_library/trunk/rtl/
29 updated counter for level1 and level2 function unneback 4850d 22h /versatile_library/trunk/rtl/
28 added sync simplex FIFO unneback 4851d 23h /versatile_library/trunk/rtl/
27 added sync simplex FIFO unneback 4851d 23h /versatile_library/trunk/rtl/
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4852d 00h /versatile_library/trunk/rtl/
25 added sync FIFO unneback 4852d 14h /versatile_library/trunk/rtl/
24 added vl_dff_ce_set unneback 4853d 21h /versatile_library/trunk/rtl/
23 fixed port map error in async fifo 1r1w unneback 4854d 12h /versatile_library/trunk/rtl/
22 added binary counters unneback 4854d 17h /versatile_library/trunk/rtl/
21 reg -> wire in and or mux in logic unneback 4855d 13h /versatile_library/trunk/rtl/

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