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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] - Rev 68

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Rev Log message Author Age Path
48 wb updated unneback 4693d 06h /versatile_library/trunk/rtl/verilog/
46 updated parity unneback 4789d 10h /versatile_library/trunk/rtl/verilog/
45 updated timing in io models unneback 4791d 04h /versatile_library/trunk/rtl/verilog/
44 added target independet IO functionns unneback 4794d 04h /versatile_library/trunk/rtl/verilog/
43 added logic for parity generation and check unneback 4798d 07h /versatile_library/trunk/rtl/verilog/
42 updated mux_andor unneback 4802d 07h /versatile_library/trunk/rtl/verilog/
41 typo in registers.v unneback 4802d 09h /versatile_library/trunk/rtl/verilog/
40 new build environment with custom.v added as a result file unneback 4802d 09h /versatile_library/trunk/rtl/verilog/
39 added simple port prio based wb arbiter unneback 4803d 06h /versatile_library/trunk/rtl/verilog/
38 updated andor mux unneback 4803d 06h /versatile_library/trunk/rtl/verilog/

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