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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [Makefile] - Rev 37

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Rev Log message Author Age Path
33 updated wb3wb3_bridge unneback 4843d 00h /versatile_library/trunk/rtl/verilog/Makefile
29 updated counter for level1 and level2 function unneback 4870d 06h /versatile_library/trunk/rtl/verilog/Makefile
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4871d 09h /versatile_library/trunk/rtl/verilog/Makefile
25 added sync FIFO unneback 4871d 22h /versatile_library/trunk/rtl/verilog/Makefile
22 added binary counters unneback 4874d 02h /versatile_library/trunk/rtl/verilog/Makefile
18 naming convention vl_ unneback 4876d 09h /versatile_library/trunk/rtl/verilog/Makefile
12 added wishbone comliant modules unneback 4947d 09h /versatile_library/trunk/rtl/verilog/Makefile
5 memories added unneback 4963d 01h /versatile_library/trunk/rtl/verilog/Makefile
4 added counters unneback 4967d 04h /versatile_library/trunk/rtl/verilog/Makefile
3 various updates
counter added
unneback 4969d 23h /versatile_library/trunk/rtl/verilog/Makefile

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