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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [Makefile] - Rev 42

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Rev Log message Author Age Path
40 new build environment with custom.v added as a result file unneback 3584d 23h /versatile_library/trunk/rtl/verilog/Makefile
33 updated wb3wb3_bridge unneback 3606d 14h /versatile_library/trunk/rtl/verilog/Makefile
29 updated counter for level1 and level2 function unneback 3633d 20h /versatile_library/trunk/rtl/verilog/Makefile
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 3634d 22h /versatile_library/trunk/rtl/verilog/Makefile
25 added sync FIFO unneback 3635d 12h /versatile_library/trunk/rtl/verilog/Makefile
22 added binary counters unneback 3637d 15h /versatile_library/trunk/rtl/verilog/Makefile
18 naming convention vl_ unneback 3639d 23h /versatile_library/trunk/rtl/verilog/Makefile
12 added wishbone comliant modules unneback 3710d 22h /versatile_library/trunk/rtl/verilog/Makefile
5 memories added unneback 3726d 14h /versatile_library/trunk/rtl/verilog/Makefile
4 added counters unneback 3730d 18h /versatile_library/trunk/rtl/verilog/Makefile
3 various updates
counter added
unneback 3733d 13h /versatile_library/trunk/rtl/verilog/Makefile

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