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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [clk_and_reset.v] - Rev 41

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Rev Log message Author Age Path
40 new build environment with custom.v added as a result file unneback 4998d 20h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
33 updated wb3wb3_bridge unneback 5020d 11h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
32 added vl_pll for ALTERA (cycloneIII) unneback 5027d 21h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
21 reg -> wire in and or mux in logic unneback 5052d 08h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
18 naming convention vl_ unneback 5053d 19h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
17 unneback 5117d 09h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
4 added counters unneback 5144d 14h /versatile_library/trunk/rtl/verilog/clk_and_reset.v
3 various updates
counter added
unneback 5147d 10h /versatile_library/trunk/rtl/verilog/clk_and_reset.v

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