URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [defines.v] - Rev 58

Rev	Log message	Author	Age	Path
49	added WB_B4RAM with byte enable	unneback	4708d 02h	/versatile_library/trunk/rtl/verilog/defines.v
48	wb updated	unneback	4714d 20h	/versatile_library/trunk/rtl/verilog/defines.v
44	added target independet IO functionns	unneback	4815d 19h	/versatile_library/trunk/rtl/verilog/defines.v
43	added logic for parity generation and check	unneback	4819d 22h	/versatile_library/trunk/rtl/verilog/defines.v
42	updated mux_andor	unneback	4823d 22h	/versatile_library/trunk/rtl/verilog/defines.v
40	new build environment with custom.v added as a result file	unneback	4824d 00h	/versatile_library/trunk/rtl/verilog/defines.v