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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [memories.v] - Rev 137

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73 no arbiter in wb_b3_ram_be unneback 3249d 01h /versatile_library/trunk/rtl/verilog/memories.v
72 no arbiter in wb_b3_ram_be unneback 3249d 01h /versatile_library/trunk/rtl/verilog/memories.v
68 ram_be updated to optional mem_size unneback 3249d 01h /versatile_library/trunk/rtl/verilog/memories.v
65 RAM_BE system verilog version unneback 3288d 00h /versatile_library/trunk/rtl/verilog/memories.v
60 added wb b3 byte enable memory, added test in makefile through icarus, typo in latch fixed unneback 3289d 20h /versatile_library/trunk/rtl/verilog/memories.v
48 wb updated unneback 3328d 21h /versatile_library/trunk/rtl/verilog/memories.v
40 new build environment with custom.v added as a result file unneback 3438d 01h /versatile_library/trunk/rtl/verilog/memories.v
31 sync FIFO updated unneback 3486d 21h /versatile_library/trunk/rtl/verilog/memories.v
28 added sync simplex FIFO unneback 3487d 23h /versatile_library/trunk/rtl/verilog/memories.v
27 added sync simplex FIFO unneback 3487d 23h /versatile_library/trunk/rtl/verilog/memories.v

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