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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [memories.v] - Rev 147

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Rev Log message Author Age Path
86 wb ram unneback 4707d 12h /versatile_library/trunk/rtl/verilog/memories.v
85 wb ram unneback 4707d 13h /versatile_library/trunk/rtl/verilog/memories.v
84 wb ram unneback 4707d 13h /versatile_library/trunk/rtl/verilog/memories.v
83 new BE_RAM unneback 4708d 00h /versatile_library/trunk/rtl/verilog/memories.v
77 bridge update unneback 4711d 20h /versatile_library/trunk/rtl/verilog/memories.v
75 added wb to avalon bridge unneback 4712d 00h /versatile_library/trunk/rtl/verilog/memories.v
73 no arbiter in wb_b3_ram_be unneback 4719d 21h /versatile_library/trunk/rtl/verilog/memories.v
72 no arbiter in wb_b3_ram_be unneback 4719d 22h /versatile_library/trunk/rtl/verilog/memories.v
68 ram_be updated to optional mem_size unneback 4719d 22h /versatile_library/trunk/rtl/verilog/memories.v
65 RAM_BE system verilog version unneback 4758d 21h /versatile_library/trunk/rtl/verilog/memories.v

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