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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library.v] - Rev 33

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Rev Log message Author Age Path
33 updated wb3wb3_bridge unneback 4846d 02h /versatile_library/trunk/rtl/verilog/versatile_library.v
32 added vl_pll for ALTERA (cycloneIII) unneback 4853d 12h /versatile_library/trunk/rtl/verilog/versatile_library.v
31 sync FIFO updated unneback 4873d 08h /versatile_library/trunk/rtl/verilog/versatile_library.v
30 updated counter for level1 and level2 function unneback 4873d 08h /versatile_library/trunk/rtl/verilog/versatile_library.v
29 updated counter for level1 and level2 function unneback 4873d 08h /versatile_library/trunk/rtl/verilog/versatile_library.v
28 added sync simplex FIFO unneback 4874d 09h /versatile_library/trunk/rtl/verilog/versatile_library.v
27 added sync simplex FIFO unneback 4874d 09h /versatile_library/trunk/rtl/verilog/versatile_library.v
25 added sync FIFO unneback 4875d 00h /versatile_library/trunk/rtl/verilog/versatile_library.v
24 added vl_dff_ce_set unneback 4876d 08h /versatile_library/trunk/rtl/verilog/versatile_library.v
23 fixed port map error in async fifo 1r1w unneback 4876d 22h /versatile_library/trunk/rtl/verilog/versatile_library.v
22 added binary counters unneback 4877d 04h /versatile_library/trunk/rtl/verilog/versatile_library.v
21 reg -> wire in and or mux in logic unneback 4878d 00h /versatile_library/trunk/rtl/verilog/versatile_library.v
18 naming convention vl_ unneback 4879d 11h /versatile_library/trunk/rtl/verilog/versatile_library.v
17 unneback 4943d 00h /versatile_library/trunk/rtl/verilog/versatile_library.v
15 added delay line unneback 4949d 08h /versatile_library/trunk/rtl/verilog/versatile_library.v
14 reg -> wire for various signals unneback 4949d 13h /versatile_library/trunk/rtl/verilog/versatile_library.v
13 cosmetic update unneback 4949d 15h /versatile_library/trunk/rtl/verilog/versatile_library.v
12 added wishbone comliant modules unneback 4950d 11h /versatile_library/trunk/rtl/verilog/versatile_library.v
11 async fifo simplex unneback 4951d 02h /versatile_library/trunk/rtl/verilog/versatile_library.v
10 added dff_ce_clear unneback 4953d 00h /versatile_library/trunk/rtl/verilog/versatile_library.v

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