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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library.v] - Rev 52

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52 added WB_B4RAM with byte enable unneback 4054d 05h /versatile_library/trunk/rtl/verilog/versatile_library.v
51 added WB_B4RAM with byte enable unneback 4054d 05h /versatile_library/trunk/rtl/verilog/versatile_library.v
50 added WB_B4RAM with byte enable unneback 4054d 05h /versatile_library/trunk/rtl/verilog/versatile_library.v
49 added WB_B4RAM with byte enable unneback 4054d 05h /versatile_library/trunk/rtl/verilog/versatile_library.v
48 wb updated unneback 4060d 23h /versatile_library/trunk/rtl/verilog/versatile_library.v
46 updated parity unneback 4157d 04h /versatile_library/trunk/rtl/verilog/versatile_library.v
45 updated timing in io models unneback 4158d 22h /versatile_library/trunk/rtl/verilog/versatile_library.v
44 added target independet IO functionns unneback 4161d 22h /versatile_library/trunk/rtl/verilog/versatile_library.v
43 added logic for parity generation and check unneback 4166d 01h /versatile_library/trunk/rtl/verilog/versatile_library.v
42 updated mux_andor unneback 4170d 01h /versatile_library/trunk/rtl/verilog/versatile_library.v
41 typo in registers.v unneback 4170d 02h /versatile_library/trunk/rtl/verilog/versatile_library.v
40 new build environment with custom.v added as a result file unneback 4170d 02h /versatile_library/trunk/rtl/verilog/versatile_library.v
39 added simple port prio based wb arbiter unneback 4170d 23h /versatile_library/trunk/rtl/verilog/versatile_library.v
38 updated andor mux unneback 4171d 00h /versatile_library/trunk/rtl/verilog/versatile_library.v
37 corrected polynom with length 20 unneback 4176d 20h /versatile_library/trunk/rtl/verilog/versatile_library.v
36 added generic andor_mux unneback 4178d 04h /versatile_library/trunk/rtl/verilog/versatile_library.v
35 added vl_mux2_andor and vl_mux3_andor localparam unneback 4178d 16h /versatile_library/trunk/rtl/verilog/versatile_library.v
34 added vl_mux2_andor and vl_mux3_andor unneback 4178d 16h /versatile_library/trunk/rtl/verilog/versatile_library.v
33 updated wb3wb3_bridge unneback 4191d 18h /versatile_library/trunk/rtl/verilog/versatile_library.v
32 added vl_pll for ALTERA (cycloneIII) unneback 4199d 04h /versatile_library/trunk/rtl/verilog/versatile_library.v

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