OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library_actel.v] - Rev 24

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
24 added vl_dff_ce_set unneback 5048d 15h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
23 fixed port map error in async fifo 1r1w unneback 5049d 05h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
22 added binary counters unneback 5049d 10h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
21 reg -> wire in and or mux in logic unneback 5050d 07h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
18 naming convention vl_ unneback 5051d 18h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
17 unneback 5115d 07h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
15 added delay line unneback 5121d 15h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
14 reg -> wire for various signals unneback 5121d 20h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
13 cosmetic update unneback 5121d 21h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
12 added wishbone comliant modules unneback 5122d 17h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
11 async fifo simplex unneback 5123d 08h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
10 added dff_ce_clear unneback 5125d 07h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
8 added dff_ce_clear unneback 5125d 07h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
7 mem update unneback 5125d 08h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v
6 added library files unneback 5138d 09h /versatile_library/trunk/rtl/verilog/versatile_library_actel.v

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.