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[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [versatile_library_altera.v] - Rev 31

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Rev Log message Author Age Path
31 sync FIFO updated unneback 4488d 18h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
30 updated counter for level1 and level2 function unneback 4488d 18h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
29 updated counter for level1 and level2 function unneback 4488d 18h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
28 added sync simplex FIFO unneback 4489d 19h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
27 added sync simplex FIFO unneback 4489d 19h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
25 added sync FIFO unneback 4490d 10h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
24 added vl_dff_ce_set unneback 4491d 18h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
23 fixed port map error in async fifo 1r1w unneback 4492d 09h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
22 added binary counters unneback 4492d 14h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
21 reg -> wire in and or mux in logic unneback 4493d 10h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
18 naming convention vl_ unneback 4494d 21h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
17 unneback 4558d 10h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
15 added delay line unneback 4564d 18h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
14 reg -> wire for various signals unneback 4564d 23h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
13 cosmetic update unneback 4565d 01h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
12 added wishbone comliant modules unneback 4565d 21h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
11 async fifo simplex unneback 4566d 12h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
10 added dff_ce_clear unneback 4568d 11h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
8 added dff_ce_clear unneback 4568d 11h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
7 mem update unneback 4568d 12h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v
6 added library files unneback 4581d 12h /versatile_library/trunk/rtl/verilog/versatile_library_altera.v

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