OpenCores
URL https://opencores.org/ocsvn/versatile_library/versatile_library/trunk

Subversion Repositories versatile_library

[/] [versatile_library/] [trunk/] [rtl/] [verilog/] [wb.v] - Rev 35

Rev

Go to most recent revision | Details | Compare with Previous | Blame

Filtering Options

Clear current filter

Rev Log message Author Age Path
33 updated wb3wb3_bridge unneback 3577d 04h /versatile_library/trunk/rtl/verilog/wb.v
32 added vl_pll for ALTERA (cycloneIII) unneback 3584d 14h /versatile_library/trunk/rtl/verilog/wb.v
18 naming convention vl_ unneback 3610d 13h /versatile_library/trunk/rtl/verilog/wb.v
17 unneback 3674d 02h /versatile_library/trunk/rtl/verilog/wb.v
14 reg -> wire for various signals unneback 3680d 15h /versatile_library/trunk/rtl/verilog/wb.v
13 cosmetic update unneback 3680d 17h /versatile_library/trunk/rtl/verilog/wb.v
12 added wishbone comliant modules unneback 3681d 13h /versatile_library/trunk/rtl/verilog/wb.v

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.