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Rev Log message Author Age Path
30 updated counter for level1 and level2 function unneback 4009d 03h /
29 updated counter for level1 and level2 function unneback 4009d 03h /
28 added sync simplex FIFO unneback 4010d 04h /
27 added sync simplex FIFO unneback 4010d 04h /
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 4010d 05h /
25 added sync FIFO unneback 4010d 19h /
24 added vl_dff_ce_set unneback 4012d 03h /
23 fixed port map error in async fifo 1r1w unneback 4012d 17h /
22 added binary counters unneback 4012d 22h /
21 reg -> wire in and or mux in logic unneback 4013d 19h /
20 naming convention vl_ unneback 4015d 05h /
19 naming convention vl_ unneback 4015d 05h /
18 naming convention vl_ unneback 4015d 06h /
17 unneback 4078d 19h /
16 converting utility for ROM unneback 4079d 06h /
15 added delay line unneback 4085d 03h /
14 reg -> wire for various signals unneback 4085d 08h /
13 cosmetic update unneback 4085d 09h /
12 added wishbone comliant modules unneback 4086d 05h /
11 async fifo simplex unneback 4086d 20h /

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