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Rev Log message Author Age Path
30 updated counter for level1 and level2 function unneback 3635d 10h /
29 updated counter for level1 and level2 function unneback 3635d 10h /
28 added sync simplex FIFO unneback 3636d 11h /
27 added sync simplex FIFO unneback 3636d 11h /
26 typo in sync FIFO, added cnt_lfsr_ce_q cnt_lfsr_ce_clear_q unneback 3636d 13h /
25 added sync FIFO unneback 3637d 02h /
24 added vl_dff_ce_set unneback 3638d 10h /
23 fixed port map error in async fifo 1r1w unneback 3639d 01h /
22 added binary counters unneback 3639d 06h /
21 reg -> wire in and or mux in logic unneback 3640d 02h /
20 naming convention vl_ unneback 3641d 13h /
19 naming convention vl_ unneback 3641d 13h /
18 naming convention vl_ unneback 3641d 13h /
17 unneback 3705d 02h /
16 converting utility for ROM unneback 3705d 14h /
15 added delay line unneback 3711d 10h /
14 reg -> wire for various signals unneback 3711d 15h /
13 cosmetic update unneback 3711d 17h /
12 added wishbone comliant modules unneback 3712d 13h /
11 async fifo simplex unneback 3713d 04h /

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