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Subversion Repositories vhdl_wb_tb

[/] [vhdl_wb_tb/] - Rev 27

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Rev Log message Author Age Path
27 added the missing wishbone_unused_address_c to my_project_pkg.vhd
fixed the readdata_v error and added the missing "end if;" in wishbone_bfm_pkg.vhd
fixed a range error in convert_pkg.vhd
minor changes to vhdl_wb_tb_Usage_guide.docx
sinx 1650d 21h /vhdl_wb_tb/
26 extended value ranges of "length" in to_string sinx 2065d 01h /vhdl_wb_tb/
25 changed default value for wb address to avoid warnings with to_integer in address decoders sinx 2065d 01h /vhdl_wb_tb/
24 changed AssertionFormat from "** [%I] %T %S %R\n" to "** %T %S %R\n" (remove instance) to shorten output in transscript window sinx 2067d 01h /vhdl_wb_tb/
23 added message output for wb_read(int,slv) sinx 2067d 01h /vhdl_wb_tb/
22 added wb_slave_out_idle_c, wb_master_in_idle_c and wb_slave_in_idle_c sinx 2067d 02h /vhdl_wb_tb/
21 added ranges to integer parameter to prevent overflows of variables in functions sinx 2067d 02h /vhdl_wb_tb/
20 fixed some locations where wishbone_address_width_c was used but wishbone_data_width_c is correct
added some comments to function declaration for better understanding
sinx 2067d 02h /vhdl_wb_tb/
19 added some more example wb_reads and comments sinx 2067d 02h /vhdl_wb_tb/
18 added handling for wb_bfm_in_s.tgd .err and .rty sinx 2067d 02h /vhdl_wb_tb/
17 added ranges to to_string functions to avoid div_by_zero errors for faulty values sinx 2076d 15h /vhdl_wb_tb/
16 wlf file not needed in archive sinx 2076d 18h /vhdl_wb_tb/
15 minor beautifying sinx 2076d 21h /vhdl_wb_tb/
14 added keyword expansion to vhdl files sinx 2076d 21h /vhdl_wb_tb/
13 testing keyword expansion sinx 2076d 22h /vhdl_wb_tb/
12 modified auto-props sinx 2076d 22h /vhdl_wb_tb/
11 modified auto-props sinx 2076d 22h /vhdl_wb_tb/
10 modified auot-props sinx 2076d 22h /vhdl_wb_tb/
9 removed external sinx 2076d 23h /vhdl_wb_tb/
8 added keyword expansion for all files sinx 2076d 23h /vhdl_wb_tb/
7 added external to project spi_master_slave for SPI master stimulator sinx 2077d 00h /vhdl_wb_tb/
6 changed path of files sinx 2077d 22h /vhdl_wb_tb/
5 added documentation
some minor cleanups
sinx 2077d 22h /vhdl_wb_tb/
4 minor refacturation
updated file header descriptions
sinx 2078d 03h /vhdl_wb_tb/
3 deleted sinx 2078d 03h /vhdl_wb_tb/
2 inital version sinx 2078d 19h /vhdl_wb_tb/
1 The project and the structure was created root 2081d 15h /vhdl_wb_tb/

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