URL https://opencores.org/ocsvn/wb_lpc/wb_lpc/trunk

Subversion Repositories wb_lpc

[/] [wb_lpc/] [trunk/] [sim/] [wb_lpc_sim/] - Rev 20

Rev	Log message	Author	Age	Path
20	New directory structure.	root	5518d 22h	/wb_lpc/trunk/sim/wb_lpc_sim/
17	Fix bugs: 25-Jul-2008 LPC firmware writes must not insert wait-states. 22-Jul-2008 LPC DMA does not report READY+MORE for multi-byte transfers Add feature: 23-Jul-2008 propagate Wishbone errors across LPC interface Improve Testbench: Ability to test multiple wait-states on LPC Peripheral Wishbone Master interface. Check wbs_err_o from LPC Host. Rebuild examples with the fixes above.	hharte	5745d 13h	/wb_lpc/trunk/sim/wb_lpc_sim/
14	Update for Xilinx ISE 10.1	hharte	5750d 04h	/wb_lpc/trunk/sim/wb_lpc_sim/
6	Clean up whitespace.	hharte	5889d 03h	/wb_lpc/trunk/sim/wb_lpc_sim/
4	Adding .cvsignore files to ignore .svn directories.	hharte	5891d 05h	/wb_lpc/trunk/sim/wb_lpc_sim/
3	Initial checkin of source files	hharte	5891d 12h	/wb_lpc/trunk/sim/wb_lpc_sim/