| Rev |
Log message |
Author |
Age |
Path |
| 55 |
A test was added to double check whether carry following right shifts worked.
This was a necessary part of getting two cycle linear feedback shift register
operations working for a memory test on a XuLA2 board. With this, I can now
verify that such feedback registers work for pseudorandom number purposes. |
dgisselq |
3117d 11h |
/zipcpu/ |
| 54 |
This builds on the support for backslash character escapes in both single
and multicharacter expressions. Backslash character escapes are now
possible with quotations and backslashes, and the same code to interpret
the escapes is applied to both single and multicharacter sequences. |
dgisselq |
3117d 11h |
/zipcpu/ |
| 53 |
Updated the #include/#define directives to work properly for nested includes.
(They were supposed to work properly for nested includes before ... and didn't)
This fixes those bugs. |
dgisselq |
3117d 11h |
/zipcpu/ |
| 52 |
Added the capability to "see" character's encoded within a binary file,
by printing the character value(s) of each opcode (if they are printable)
on each line. |
dgisselq |
3117d 11h |
/zipcpu/ |
| 51 |
Added the capability to look at binary files and 'see' characters as they
are encoded in memory. |
dgisselq |
3117d 11h |
/zipcpu/ |
| 50 |
Dhrystone benchmark updates--added the copyright notice. (Oops!) |
dgisselq |
3127d 03h |
/zipcpu/ |
| 49 |
Final set of changes finishing the Dhrystone package. Dhrystone, as
implemented by hand in assembly, now works. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 48 |
Files added/updated to get Dhrystone benchmark to work. Several fixes
to the CPU in the process, 'cause it wasn't working. Stall-less ALU
ops now work better, to include grabbing the memory result as it comes out
of the memory unit and placing it straight into either ALU or memory unit
for the next instruction. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 47 |
Added some new graphics, includes the file for the Zip Bones system. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 46 |
A series of updates associated with getting Dhrystone to work. Includes
updates to getting multiple files to link/work together within the assembler,
as well as getting quoted quotations to work in the lexer, and better
include file support in the preprocessor. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 45 |
Library routines for 32-bit multiply and divide, both signed and unsigned. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 44 |
?? |
dgisselq |
3127d 03h |
/zipcpu/ |
| 43 |
Minor edits to the C++ testbench. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 42 |
Oops -- forgot to add the stack. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 41 |
Assembly file for the Dhrystone benchmark added. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 40 |
Quick update, updates the assembly for the new version of the assembler. |
dgisselq |
3127d 03h |
/zipcpu/ |
| 39 |
Here's the documentation update to support the pipelined read/writes of
the bus from the CPU, as well as the test file that proved they worked. |
dgisselq |
3130d 06h |
/zipcpu/ |
| 38 |
A couple of quick updates:
- The Zip CPU now supports pipelined memory access at one clock per
instruction (assuming all the instructions are in the cache)
- There is now a 'zipbones' module to build a Zip System without peripherals.
Any peripherals would then need to be external to the CPU.
- Some bug fixes.
Documentation changes coming shortly. |
dgisselq |
3130d 08h |
/zipcpu/ |
| 37 |
Fixed some minor spelling errors. |
dgisselq |
3138d 23h |
/zipcpu/ |
| 36 |
*Lots* of changes to increase processing speed and remove pipeline stalls.
Removed the useless flash cache, replacing it with a proper DMA controller.
"make test" in the main directory now runs a test program in Verilator and
reports on the results. |
dgisselq |
3139d 11h |
/zipcpu/ |
