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[/] [zipcpu/] - Rev 76

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56 Here's a bit of work in progress for getting the Zip CPU working on a XuLA2
board. Many changes include: the existence of a cpudefs.v file to control
what "options" are included in the ZipCPU build. This allows build control
to be separated from the project directory (one build for a XuLA2 board,
another for a Basys-3 development board). Other changes have made things
perhaps harder to read, but they get rid of warnings from XST.

A big change was the addition of the (* ram_style="distributed" *) comment
for the register set. This was necessary to keep XST from inferring a block
RAM and breaking the logic that was supposed to take place between a register
read and when it was used.		 dgisselq 3111d 12h /zipcpu/
55 A test was added to double check whether carry following right shifts worked.
This was a necessary part of getting two cycle linear feedback shift register
operations working for a memory test on a XuLA2 board. With this, I can now
verify that such feedback registers work for pseudorandom number purposes.		 dgisselq 3111d 12h /zipcpu/
54 This builds on the support for backslash character escapes in both single
and multicharacter expressions. Backslash character escapes are now
possible with quotations and backslashes, and the same code to interpret
the escapes is applied to both single and multicharacter sequences.		 dgisselq 3111d 12h /zipcpu/
53 Updated the #include/#define directives to work properly for nested includes.
(They were supposed to work properly for nested includes before ... and didn't)
This fixes those bugs.		 dgisselq 3111d 12h /zipcpu/
52 Added the capability to "see" character's encoded within a binary file,
by printing the character value(s) of each opcode (if they are printable)
on each line.		 dgisselq 3111d 12h /zipcpu/
51 Added the capability to look at binary files and 'see' characters as they
are encoded in memory.		 dgisselq 3111d 12h /zipcpu/
50 Dhrystone benchmark updates--added the copyright notice. (Oops!) dgisselq 3121d 03h /zipcpu/
49 Final set of changes finishing the Dhrystone package. Dhrystone, as
implemented by hand in assembly, now works.		 dgisselq 3121d 03h /zipcpu/
48 Files added/updated to get Dhrystone benchmark to work. Several fixes
to the CPU in the process, 'cause it wasn't working. Stall-less ALU
ops now work better, to include grabbing the memory result as it comes out
of the memory unit and placing it straight into either ALU or memory unit
for the next instruction.		 dgisselq 3121d 03h /zipcpu/
47 Added some new graphics, includes the file for the Zip Bones system. dgisselq 3121d 03h /zipcpu/

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