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[/] [zipcpu/] [trunk/] - Rev 102

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Rev Log message Author Age Path
82 Found and (I hope) fixed a nasty bug that would send the prefetch into an
endless loop whenever you jumped to an instruction at the last location
in an unloaded cache line.
dgisselq 3007d 15h /zipcpu/trunk/
81 Trying to clean up ISE generated warnings. dgisselq 3007d 15h /zipcpu/trunk/
80 Bug fix: declared the (combined) multiply to be signed again. Also
changed the name of the generate'd for block, to keep ISE from complaining.
dgisselq 3007d 15h /zipcpu/trunk/
79 Adjusted the opcodes for NOOP, BREAK, and LOCK. dgisselq 3011d 18h /zipcpu/trunk/
78 Found/corrected annoying bug in floating point documentation of the opcode
table.
dgisselq 3011d 18h /zipcpu/trunk/
77 First check-in: the test bench for the divide instruction. dgisselq 3012d 17h /zipcpu/trunk/
76 The biggest change here was to zippy_tb, to make it more similar to the debugger
and to make it work with VLIW-type instructions.
dgisselq 3012d 17h /zipcpu/trunk/
75 Modified for VLIW instructions. dgisselq 3012d 18h /zipcpu/trunk/
74 Added a bunch of debugging code to the Dhrystone benchmark assembly file, as
well as two new testing assembly files.
dgisselq 3012d 18h /zipcpu/trunk/
73 Documentations updates. dgisselq 3012d 18h /zipcpu/trunk/

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