URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] - Rev 207

Rev	Log message	Author	Age	Path
187	Updated to match changed register definitions within the core.	dgisselq	2778d 16h	/zipcpu/trunk/
186	Now allows profile dumping for ELF executables.	dgisselq	2778d 16h	/zipcpu/trunk/
185	Now includes the proper flags for building with ELF executable file support.	dgisselq	2778d 16h	/zipcpu/trunk/
184	Adjusted the illegal instruction option documentation.	dgisselq	2778d 16h	/zipcpu/trunk/
183	Cleaned up the system so that !CYC implies !STB as well.	dgisselq	2778d 16h	/zipcpu/trunk/
182	Bug fix for fast memories. This now works for memories with single cycle latencies.	dgisselq	2778d 16h	/zipcpu/trunk/
181	Adjusted the wishbone logic to include our wishbone simplification that if CYC is ever low, STB must be low as well.	dgisselq	2778d 16h	/zipcpu/trunk/
180	Cleaned up the stall logic--made it independent of whether or not we are designed to be alternating or not.	dgisselq	2778d 16h	/zipcpu/trunk/
179	Lots of changes, most (all?) of them to the non-pipelined core. The resulting core is now about 100-120 LUTs smaller when not-pipelined, and yet maintains the pipelined logic when necessary.	dgisselq	2778d 16h	/zipcpu/trunk/
178	Rewrote the parameter controlled logic to be just that: perameter controller, rather than depending upon generics. The result reduces our area by a couple LUTs.	dgisselq	2778d 16h	/zipcpu/trunk/