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[/] [zipcpu/] [trunk/] [bench/] [asm/] - Rev 36

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36 *Lots* of changes to increase processing speed and remove pipeline stalls.

Removed the useless flash cache, replacing it with a proper DMA controller.

"make test" in the main directory now runs a test program in Verilator and
reports on the results.
dgisselq 3363d 23h /zipcpu/trunk/bench/asm/
12 Bunch of changes while trying to get a hello world program:
1. Right shifts by 32 or more now result in zero, or all of the top bit in the
case of ASRs.
2. zdump now properly includes addresses with dumped lines.
3. zparser now properly handles immediate values via the .DAT instruction.
dgisselq 3417d 16h /zipcpu/trunk/bench/asm/
11 This version works on an FPGA!!!

(Or at least the wdt.S program passes ...)
dgisselq 3418d 00h /zipcpu/trunk/bench/asm/
10 Here's the watchdog timer code, as well as some pictures of the register
set.
dgisselq 3418d 14h /zipcpu/trunk/bench/asm/
2 An initial load. No promises of what works or not, but this is where the
project is at.
dgisselq 3419d 15h /zipcpu/trunk/bench/asm/

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