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[/] [zipcpu/] [trunk/] [bench/] [cpp/] - Rev 185

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185 Now includes the proper flags for building with ELF executable file support. dgisselq 2867d 08h /zipcpu/trunk/bench/cpp/
159 Now supports building a simulator that can load ELF files, such as GCC and/or
binutils will produce.
dgisselq 2960d 04h /zipcpu/trunk/bench/cpp/
155 Improved debug trace quality, for finding bugs after the fact. dgisselq 2960d 04h /zipcpu/trunk/bench/cpp/
154 Added timing checks on the busy and valid signals: either one of the two is
valid, or the whole is idle.
dgisselq 2960d 04h /zipcpu/trunk/bench/cpp/
149 Updated the Makefile documentation and the all target. dgisselq 2993d 03h /zipcpu/trunk/bench/cpp/
148 Minor changes to get LONG_MPY working, and adjust the documentation. dgisselq 2993d 03h /zipcpu/trunk/bench/cpp/
147 Cleans up div_tb a bit, causing it to write SUCCESS out if successful and
abort if not.
dgisselq 2993d 03h /zipcpu/trunk/bench/cpp/
140 Minor changes, but fixes build of zippy_tb.cpp. dgisselq 2996d 16h /zipcpu/trunk/bench/cpp/
134 Working updates, to keep this up to date with the RTL code. dgisselq 3014d 04h /zipcpu/trunk/bench/cpp/
105 Fixed some nasty early branching bugs. Adjusted the Makefile to declare that
cpudefs.h was automatically generated from cpudefs.v, and made sure that
zipbones included the cpudefs.v so it could get the DEBUG_SCOPE define.
In addition, the test.S was updated to test long jumps, the early branching
bug we found, and all three early branching instructions: ADD #x,PC, LOC(PC),PC,
and LDI #x,PC.
dgisselq 3057d 13h /zipcpu/trunk/bench/cpp/
87 Adjusted the operator input line to reflect actual logic inputs, rather
than the registered inputs which may have been out of date. (Indeed, they
were out of date for the bug I was chasing and fixed ...)
dgisselq 3124d 05h /zipcpu/trunk/bench/cpp/
77 First check-in: the test bench for the divide instruction. dgisselq 3129d 08h /zipcpu/trunk/bench/cpp/
76 The biggest change here was to zippy_tb, to make it more similar to the debugger
and to make it work with VLIW-type instructions.
dgisselq 3129d 08h /zipcpu/trunk/bench/cpp/
75 Modified for VLIW instructions. dgisselq 3129d 08h /zipcpu/trunk/bench/cpp/
69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.
dgisselq 3135d 13h /zipcpu/trunk/bench/cpp/
58 Added a rudimentary profiling support to the simulator. dgisselq 3196d 13h /zipcpu/trunk/bench/cpp/
57 Some bug fixes to the dhrystone benchmark, and some compile time defines for
the test bench processor. Of the most important note is the fix to detect
lockups on the debug/wishbone bus--that has been a real help in getting the
ZipCPU installed and the debugger working on the various boards I'm working
with. (i.e., it's helped me find and figure out why/when things haven't worked)
Of other note is the new 'G' key in the testbench code, to cause the test
bench to run without user interaction until the next keystroke. This is
very valuable in long programs, as it makes getting to/from breakpoints
easier (i.e. you don't have to wait as long, hit 'G', breathe, hit 'space'
and you're there).
dgisselq 3206d 15h /zipcpu/trunk/bench/cpp/
43 Minor edits to the C++ testbench. dgisselq 3216d 07h /zipcpu/trunk/bench/cpp/
39 Here's the documentation update to support the pipelined read/writes of
the bus from the CPU, as well as the test file that proved they worked.
dgisselq 3219d 10h /zipcpu/trunk/bench/cpp/
36 *Lots* of changes to increase processing speed and remove pipeline stalls.

Removed the useless flash cache, replacing it with a proper DMA controller.

"make test" in the main directory now runs a test program in Verilator and
reports on the results.
dgisselq 3228d 16h /zipcpu/trunk/bench/cpp/

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