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[/] [zipcpu/] [trunk/] [bench/] [cpp/] [memsim.cpp] - Rev 134

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69 This implements the "new Instruction Set" architecture for the Zip CPU. It's
a massive change set, that touches just about everything but probably not
enough of everything. Please see the spec.pdf for a description of this
new architecture.
dgisselq 3019d 06h /zipcpu/trunk/bench/cpp/memsim.cpp
36 *Lots* of changes to increase processing speed and remove pipeline stalls.

Removed the useless flash cache, replacing it with a proper DMA controller.

"make test" in the main directory now runs a test program in Verilator and
reports on the results.
dgisselq 3112d 09h /zipcpu/trunk/bench/cpp/memsim.cpp
2 An initial load. No promises of what works or not, but this is where the
project is at.
dgisselq 3168d 01h /zipcpu/trunk/bench/cpp/memsim.cpp

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