OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [doc/] - Rev 120

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
23 Oops -- left some portions of the RTC Clock spec in with the ZIP CPU spec.
These were quickly removed.
dgisselq 3341d 09h /zipcpu/trunk/doc/
22 dgisselq 3341d 09h /zipcpu/trunk/doc/
21 This update adds an incomplete version of the specification for the chip.
I ned to come back to this and do a lot more writing, but it is a start.
dgisselq 3341d 09h /zipcpu/trunk/doc/
10 Here's the watchdog timer code, as well as some pictures of the register
set.
dgisselq 3362d 02h /zipcpu/trunk/doc/
8 Fixed the rotate left instruction to work in the zasm parser, and to be
properly referenced in the simulator. The instruction set documentation was
also adjusted to reflect what the CPU actually does.
dgisselq 3362d 08h /zipcpu/trunk/doc/
7 Here's the iset.html file that was at one time in the gfx directory, but
which could not be moved due to a bad gateway error ... (Grrr).
dgisselq 3362d 09h /zipcpu/trunk/doc/
6 Trying to move iset.html from gfx directory. dgisselq 3362d 10h /zipcpu/trunk/doc/
5 Updated colors in the graphics. dgisselq 3362d 10h /zipcpu/trunk/doc/
2 An initial load. No promises of what works or not, but this is where the
project is at.
dgisselq 3363d 03h /zipcpu/trunk/doc/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.