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33 Finally finished a first draft of the full specification! dgisselq 3168d 06h /zipcpu/trunk/doc/
32 Updated the document to match the most recent changes to the CPU. Specifically,
these include the re-instatement of the full SUB command with immediate offset,
and ... others I cannot remember.

The new document also describes what conditions create pipeline stalls,
together with how many cycles each stall condition will create.		 dgisselq 3168d 14h /zipcpu/trunk/doc/
24 Lots more changes to the spec. It's still not done, but it is more complete
than before.		 dgisselq 3171d 14h /zipcpu/trunk/doc/
23 Oops -- left some portions of the RTC Clock spec in with the ZIP CPU spec.
These were quickly removed.		 dgisselq 3173d 10h /zipcpu/trunk/doc/
22 dgisselq 3173d 10h /zipcpu/trunk/doc/
21 This update adds an incomplete version of the specification for the chip.
I ned to come back to this and do a lot more writing, but it is a start.		 dgisselq 3173d 10h /zipcpu/trunk/doc/
10 Here's the watchdog timer code, as well as some pictures of the register
set.		 dgisselq 3194d 03h /zipcpu/trunk/doc/
8 Fixed the rotate left instruction to work in the zasm parser, and to be
properly referenced in the simulator. The instruction set documentation was
also adjusted to reflect what the CPU actually does.		 dgisselq 3194d 10h /zipcpu/trunk/doc/
7 Here's the iset.html file that was at one time in the gfx directory, but
which could not be moved due to a bad gateway error ... (Grrr).		 dgisselq 3194d 11h /zipcpu/trunk/doc/
6 Trying to move iset.html from gfx directory. dgisselq 3194d 11h /zipcpu/trunk/doc/
5 Updated colors in the graphics. dgisselq 3194d 11h /zipcpu/trunk/doc/
2 An initial load. No promises of what works or not, but this is where the
project is at.		 dgisselq 3195d 04h /zipcpu/trunk/doc/

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