OpenCores
URL https://opencores.org/ocsvn/zipcpu/zipcpu/trunk

Subversion Repositories zipcpu

[/] [zipcpu/] [trunk/] [rtl/] - Rev 187

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
130 Simplified the lock logic, and removed it when pipelining was not defined. This
also means the file is now dependent upon cpudefs.v. In another change, brev
was modified so as not to update the flags. This makes it useable with GCC
as a potential move or load immediate instruction.
dgisselq 2352d 12h /zipcpu/trunk/rtl/
129 Bug fix. Fixes some ugly race conditions that would cause code from the wrong
address to be executed.
dgisselq 2352d 12h /zipcpu/trunk/rtl/
128 Cleaned up some comments. dgisselq 2352d 12h /zipcpu/trunk/rtl/
118 Fixes two bugs: 1) in the early branching code within the instruction decoder.
This prevented the early branching from working when built with Xilinx's tools,
while the code worked with Verilator. 2) The CPU was not working with the
traditional cache and early branching disabled. These two bugs masked each
other. The replacement code is simpler.
dgisselq 2371d 13h /zipcpu/trunk/rtl/
115 A bug fix, applies to when there are more than 9 interrupt lines into the CPU. dgisselq 2371d 21h /zipcpu/trunk/rtl/
105 Fixed some nasty early branching bugs. Adjusted the Makefile to declare that
cpudefs.h was automatically generated from cpudefs.v, and made sure that
zipbones included the cpudefs.v so it could get the DEBUG_SCOPE define.
In addition, the test.S was updated to test long jumps, the early branching
bug we found, and all three early branching instructions: ADD #x,PC, LOC(PC),PC,
and LDI #x,PC.
dgisselq 2395d 21h /zipcpu/trunk/rtl/
91 Minor updates. dgisselq 2436d 14h /zipcpu/trunk/rtl/
90 Removed MOV x(PC),PC from the list of possible early branching instructions.
ADD X,PC and LDI X,PC are now the only recognized early branching instructions.
This was done to spare logic, although I don't think I spared more than a
LUT or two.
dgisselq 2436d 14h /zipcpu/trunk/rtl/
88 Eliminated some warnings. The div fixes were to simplify the logic, even though
the result is less readable ...
dgisselq 2460d 14h /zipcpu/trunk/rtl/
84 Minor updates. dgisselq 2462d 13h /zipcpu/trunk/rtl/

< Prev 1 2

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2022 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.