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Rev Log message Author Age Path
136 Oops --- missed a couple HOST_WIDE_INT values in a printf. This casts them
to (long), so that we can work on both PC's and ARMs.		 dgisselq 2919d 16h /
135 Replaced all occurrences of INTVAL(...) on printf lines with (long)INTVAL(...).
This should fix the problems zip-gcc was having while running on the ARM.		 dgisselq 2919d 16h /
134 Working updates, to keep this up to date with the RTL code. dgisselq 2920d 13h /
133 Changes preceding an instruction set update, which will change the multiply
operation from a 16x16 bit multiply to three types of 32x32-bit multiplies.		 dgisselq 2920d 13h /
132 Lots of minor bug fixes. dgisselq 2920d 13h /
131 Fixed a variable use before declaration error. dgisselq 2920d 13h /
130 Simplified the lock logic, and removed it when pipelining was not defined. This
also means the file is now dependent upon cpudefs.v. In another change, brev
was modified so as not to update the flags. This makes it useable with GCC
as a potential move or load immediate instruction.		 dgisselq 2920d 13h /
129 Bug fix. Fixes some ugly race conditions that would cause code from the wrong
address to be executed.		 dgisselq 2920d 13h /
128 Cleaned up some comments. dgisselq 2920d 13h /
127 Lots of changes and bugfixes. The disassembler produces more readable output.
The assembler and linker will no longer automatically use LDIHI--in preparation
for switching to LONG_MPY. LDIHI/LDILO pairs have been changed to BREV/LDILO
pairs. Within the compiler, conditional moves have been rebuilt. They're not
perfect yet, but they are better. Lots of peephole optimizations, etc.		 dgisselq 2920d 13h /

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