OpenCores
URL https://opencores.org/ocsvn/minsoc/minsoc/trunk

Subversion Repositories minsoc

[/] [minsoc/] [branches/] [rc-1.0/] [sim/] - Rev 132

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 132, 2011-11-03 14:10:18 GMT
  • Author: rfajardo
  • Log message:
    ModelSim simulation, running top_module minsoc_bench_clock now, instead of minsoc_bench.

powered by: WebSVN 2.1.0

© copyright 1999-2020 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.