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[/] [minsoc/] [tags/] [release-0.9/] [bench/] [verilog/] - Rev 11
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Last modification
- Rev 11, 2009-10-23 14:49:17 GMT
- Author: rfajardo
- Log message:
- External interrupt processing was being run multiple times because:
-external level interrupts have to be cleared
-internal interrupt status register has to be cleared
Since internal interrupt status register was being cleared before external level interrupts clearance, these internal interrupt status was being overwritten inbetween.
Solution:
-move status register reset to end of interrupt handler instead of beginning.
Testbench signal uart_srx initialized now.