OpenCores
URL https://opencores.org/ocsvn/mod_sim_exp/mod_sim_exp/trunk

Subversion Repositories mod_sim_exp

[/] [mod_sim_exp/] [trunk/] [rtl/] - Rev 6

Rev

Directory listing | View Log | Compare with Previous | RSS feed

Last modification

  • Rev 6, 2012-10-23 10:48:35 GMT
  • Author: JonasDC
  • Log message:
    Modified the architecture, no longer uses Xilinx primitive, instead generic instantiation
    added descriptive comments

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.