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openmsp430
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https://opencores.org/websvn//websvn/listing?repname=openmsp430&path=%2F&
Fri, 08 May 2026 06:07:27 +0100
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Update Changelog.
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=228
<div><strong>Rev 228 - olivier.girard</strong> (1 file(s) modified)</div><div>Update Changelog.</div>~ /openmsp430/trunk/ChangeLog_tools.txt<br />
olivier.girard
Sun, 08 Apr 2018 21:26:19 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=228
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Fix Software development tools issue preventing COM port connections on ...
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=227
<div><strong>Rev 227 - olivier.girard</strong> (1 file(s) modified)</div><div>Fix Software development tools issue preventing COM port connections on ...</div>~ /openmsp430/trunk/tools/lib/tcl-lib/dbg_utils.tcl<br />
olivier.girard
Sun, 08 Apr 2018 21:24:38 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=227
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Fix documentation typo with 'BCSCTLx/DCOCTL' names and addresses.
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=226
<div><strong>Rev 226 - olivier.girard</strong> (5 file(s) modified)</div><div>Fix documentation typo with 'BCSCTLx/DCOCTL' names and addresses.</div>~ /openmsp430/trunk/doc/html/dma_interface.html<br />~ /openmsp430/trunk/doc/html/integration.html<br />~ /openmsp430/trunk/doc/html/peripherals.html<br />~ /openmsp430/trunk/doc/openMSP430.odt<br />~ /openmsp430/trunk/doc/openMSP430.pdf<br />
olivier.girard
Mon, 06 Nov 2017 22:42:03 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=226
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Fix documentation typo regarding the 'per_we' port name.
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=225
<div><strong>Rev 225 - olivier.girard</strong> (4 file(s) modified)</div><div>Fix documentation typo regarding the 'per_we' port name.</div>~ /openmsp430/trunk/doc/html/integration.html<br />~ /openmsp430/trunk/doc/html/peripherals.html<br />~ /openmsp430/trunk/doc/openMSP430.odt<br />~ /openmsp430/trunk/doc/openMSP430.pdf<br />
olivier.girard
Mon, 06 Nov 2017 21:55:13 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=225
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Update typo in the instruction length table documentation.
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=224
<div><strong>Rev 224 - olivier.girard</strong> (3 file(s) modified)</div><div>Update typo in the instruction length table documentation.</div>~ /openmsp430/trunk/doc/html/core.html<br />~ /openmsp430/trunk/doc/openMSP430.odt<br />~ /openmsp430/trunk/doc/openMSP430.pdf<br />
olivier.girard
Mon, 05 Dec 2016 22:55:13 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=224
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Adjust register mapping of FRAME_SELECT
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=223
<div><strong>Rev 223 - olivier.girard</strong> (2 file(s) modified)</div><div>Adjust register mapping of FRAME_SELECT</div>~ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/opengfx430/ogfx_reg.v<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/gfx/gfx_controller.h<br />
olivier.girard
Thu, 03 Nov 2016 22:51:23 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=223
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Update to latest openGFX430 version. Update 2BPP demo.
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=222
<div><strong>Rev 222 - olivier.girard</strong> (13 file(s) modified)</div><div>Update to latest openGFX430 version. Update 2BPP demo.</div>~ /openmsp430/trunk/doc/html/overview.html<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/opengfx430/ogfx_backend.v<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/opengfx430/ogfx_backend_lut_fifo.v<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/opengfx430/ogfx_reg.v<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/opengfx430/openGFX430.v<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openMSP430_fpga.v<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/demo_2bpp.c<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/main.c<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/gfx/gfx_controller.h<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/gfx_demo.jic<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/gfx_demo.sof<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/leds.jic<br />~ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/leds.sof<br />
olivier.girard
Wed, 02 Nov 2016 21:47:03 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=222
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Move old Altera-DE1 project to the OBSOLETE directory.
Create new Altera-DE0-Nano-SoC ...
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=221
<div><strong>Rev 221 - olivier.girard</strong> (664 file(s) modified)</div><div>Move old Altera-DE1 project to the OBSOLETE directory.<br />
Create new Altera-DE0-Nano-SoC ...</div>+ /openmsp430/trunk/fpga/altera_de0_nano_soc<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench/verilog<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench/verilog/altsyncram.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench/verilog/cyclonev_io.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench/verilog/msp_debug.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench/verilog/registers_omsp.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench/verilog/tb_openMSP430_fpga.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/bench/verilog/timescale.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/ADC<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/ADC/2308fb.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Bead<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Bead/742792609.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Bead/742792731.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Bead/742792780.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Bead/7427927110.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Clock_Generator<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Clock_Generator/CDCE937.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Micro-USB_Type-AB<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Micro-USB_Type-AB/629105150921.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Mini-USB_Type-B<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Mini-USB_Type-B/651005136521.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Pin_Header<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Pin_Header/6130xx11821.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Pin_Header/6130xx21121.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Connector/Pin_Header/6250xx21621.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Current_Limited<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Current_Limited/slvsbd0.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/DDR3_SDRAM<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/DDR3_SDRAM/43TR16256A-85120AL(ISSI).pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Dip_Switch<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Dip_Switch/4161311608xx.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/ESD<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/ESD/tpd2e001.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/ESD/tpd2eusb30.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Ethernet<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Ethernet/KSZ9031RNX.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA/5CSEMA4.xls<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA/5CSEMA4U23C6_pin_view.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA/C5_pin_connection_guide.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA/cyclone5_handbook.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA/Cyclone V Device Overview.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA/cyclone_5_datasheet.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/FPGA/UBGA_672pin_package_spec.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/G-Sensor<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/G-Sensor/ADXL345.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/LED<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/LED/150060BS75000.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/LED/150060SS75000.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/LED/150060VS75000.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/LED/150060YS75000.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/MicroSD_Socket<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/MicroSD_Socket/693071010811.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Panasonic<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Panasonic/AAA8000CE5(POSCAP_TPE_Serial).pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Panasonic/AOA0000CE2(Chip Resistors).pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Panasonic/AOC0000CE1(Chip Resistor Array).pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power/LT3080.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power/LT3580.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power/LTC3612.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power/tps51200.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power_Inductor<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power_Inductor/74438335022.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power_Inductor/744383340033.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Power_Inductor/744383340047.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Reset_IC<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Reset_IC/tlv809k33.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/Reset_IC/tps3831k33.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/SPI_FLASH(EPCS)<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/SPI_FLASH(EPCS)/S25FL128S_256S_00.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/UART_to_USB<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/UART_to_USB/DS_FT232R.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/USB_PHY<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Datasheet/USB_PHY/USB3300-EZK.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/DE0-Nano-SoC_howto_sof_to_jic.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC/.qsys_edit<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC/.qsys_edit/filters.xml<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC/.qsys_edit/preferences.xml<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC/c5_pin_model_dump.txt<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC/DE0_NANO_SOC_ADC.done<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC/DE0_NANO_SOC_ADC.fit.smsg<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/doc/Terasic/DE0_NANO_SOC/Demonstrations/FPGA/DE0_NANO_SOC_ADC/DE0_NANO_SOC_ADC.fit.summary<br />+ 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/openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/opengfx430/openGFX430_undefines.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/filelist.f<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_alu.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_and_gate.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_clock_gate.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_clock_module.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_clock_mux.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_dbg.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_dbg_hwbrk.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_dbg_i2c.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_dbg_uart.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_execution_unit.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_frontend.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_mem_backbone.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_multiplier.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_register_file.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_scan_mux.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_sfr.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_sync_cell.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_sync_reset.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_wakeup_cell.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/omsp_watchdog.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/openMSP430.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/openMSP430_defines.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/openMSP430_undefines.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/periph<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/periph/omsp_gpio.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/periph/omsp_timerA.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/periph/omsp_timerA_defines.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/periph/omsp_timerA_undefines.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/periph/template_periph_8b.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openmsp430/periph/template_periph_16b.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/openMSP430_fpga.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/rtl/verilog/sync_debouncer_10ms.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/bin<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/bin/ihex2mem.tcl<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/bin/ihex2mif.tcl<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/bin/msp430sim<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/bin/omsp_config.sh<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/bin/rtlsim.sh<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/run<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/run/run<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/run/run_clean<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/run/run_disassemble<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/src<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/src/leds.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/sim/rtl_sim/src/submit.f<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/demo.h<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/demo_1bpp.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/demo_2bpp.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/demo_4bpp.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/demo_8bpp.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/demo_16bpp.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/main.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/gfx_demo/makefile<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/leds<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/leds/main.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/apps/leds/makefile<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/ldscripts<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/ldscripts/linker.msp430-elf.x<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/ldscripts/linker.msp430.x<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/gfx<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/gfx/gfx_controller.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/gfx/gfx_controller.h<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/omsp_system.h<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/tA<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/tA/timerA.c<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/software/libs/tA/timerA.h<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/0_create_bitstream.sh<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/1_program_fpga.sh<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/2_program_flash.sh<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/DE0-Nano-SoC_howto_sof_to_jic.pdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/gfx_demo.jic<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/gfx_demo.sof<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/leds.jic<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/bitstreams/leds.sof<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/README_JTAG_DEBUG<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/scripts<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/scripts/chain_with_flash.cdf<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/scripts/design.sdc<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/scripts/design_rtl.v<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/scripts/ihex2mif.tcl<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/scripts/sof2jic.cof<br />+ /openmsp430/trunk/fpga/altera_de0_nano_soc/synthesis/altera/scripts/synthesis.tcl<br />- /openmsp430/trunk/fpga/altera_de1_board<br />+ /openmsp430/trunk/fpga/OBSOLETE/altera_de1_board<br />
olivier.girard
Wed, 17 Aug 2016 21:48:38 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=221
-
Create OBSOLETE directory to store old FPGA projects
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=220
<div><strong>Rev 220 - olivier.girard</strong> (1 file(s) modified)</div><div>Create OBSOLETE directory to store old FPGA projects</div>+ /openmsp430/trunk/fpga/OBSOLETE<br />
olivier.girard
Wed, 17 Aug 2016 20:43:54 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=220
-
Update overview html file
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=219
<div><strong>Rev 219 - olivier.girard</strong> (1 file(s) modified)</div><div>Update overview html file</div>~ /openmsp430/trunk/doc/html/overview.html<br />
olivier.girard
Mon, 01 Aug 2016 21:13:18 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=219
-
Update Tools Changelog
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=218
<div><strong>Rev 218 - olivier.girard</strong> (1 file(s) modified)</div><div>Update Tools Changelog</div>~ /openmsp430/trunk/ChangeLog_tools.txt<br />
olivier.girard
Mon, 01 Aug 2016 21:06:20 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=218
-
Update openmsp430-gdb-proxy tool to fix Get Register procedure when using ...
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=217
<div><strong>Rev 217 - olivier.girard</strong> (1 file(s) modified)</div><div>Update openmsp430-gdb-proxy tool to fix Get Register procedure when using ...</div>~ /openmsp430/trunk/tools/openmsp430-gdbproxy/commands.tcl<br />
olivier.girard
Mon, 01 Aug 2016 21:04:04 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=217
-
Add new donate picture.
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=216
<div><strong>Rev 216 - olivier.girard</strong> (1 file(s) modified)</div><div>Add new donate picture.</div>+ /openmsp430/trunk/doc/html/images/donate_buttons/chip_no_button_paypal_payment.png<br />
olivier.girard
Mon, 01 Aug 2016 21:02:55 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=216
-
Update ChangeLog
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=215
<div><strong>Rev 215 - olivier.girard</strong> (1 file(s) modified)</div><div>Update ChangeLog</div>~ /openmsp430/trunk/ChangeLog_tools.txt<br />
olivier.girard
Sat, 12 Mar 2016 20:16:58 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=215
-
Fix multiwindow environment issue & close window with 'X'. Thanks ...
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=214
<div><strong>Rev 214 - olivier.girard</strong> (3 file(s) modified)</div><div>Fix multiwindow environment issue & close window with 'X'. Thanks ...</div>~ /openmsp430/trunk/tools/bin/openmsp430-gdbproxy.tcl<br />~ /openmsp430/trunk/tools/bin/openmsp430-minidebug.tcl<br />~ /openmsp430/trunk/tools/lib/tcl-lib/combobox.tcl<br />
olivier.girard
Sat, 12 Mar 2016 20:15:33 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=214
-
Update ChangeLogs
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=213
<div><strong>Rev 213 - olivier.girard</strong> (2 file(s) modified)</div><div>Update ChangeLogs</div>~ /openmsp430/trunk/ChangeLog_core.txt<br />~ /openmsp430/trunk/ChangeLog_tools.txt<br />
olivier.girard
Tue, 17 Nov 2015 11:08:26 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=213
-
Update all FPGA project examples to support both MSPGCC and ...
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=212
<div><strong>Rev 212 - olivier.girard</strong> (68 file(s) modified)</div><div>Update all FPGA project examples to support both MSPGCC and ...</div>~ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/msp430sim<br />~ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/bin/rtlsim.sh<br />+ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/sim/rtl_sim/run/run_clean<br />+ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/software/spacewar/linker.msp430-elf.x<br />+ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/software/spacewar/linker.msp430.x<br />- /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/software/spacewar/linker.x<br />~ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/software/spacewar/makefile<br />~ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/software/spacewar/omsp_system.h<br />~ /openmsp430/trunk/fpga/actel_m1a3pl_dev_kit/software/spacewar/update.c<br />~ /openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/bin/msp430sim<br />~ /openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/bin/rtlsim.sh<br />+ /openmsp430/trunk/fpga/altera_de1_board/sim/rtl_sim/run/run_clean<br />- /openmsp430/trunk/fpga/altera_de1_board/software/memledtest/link.ld<br />+ /openmsp430/trunk/fpga/altera_de1_board/software/memledtest/linker.msp430-elf.x<br />+ /openmsp430/trunk/fpga/altera_de1_board/software/memledtest/linker.msp430.x<br />~ /openmsp430/trunk/fpga/altera_de1_board/software/memledtest/main.c<br />~ /openmsp430/trunk/fpga/altera_de1_board/software/memledtest/makefile<br />~ /openmsp430/trunk/fpga/altera_de1_board/software/memledtest/omsp_system.h<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/rtl/verilog/openMSP430_fpga.v<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/bin/msp430sim<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/bin/rtlsim.sh<br />+ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/run/run_clean<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/src/submit.f<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/sim/rtl_sim/src/submit.prj<br />- /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/7seg.c<br />- /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/7seg.h<br />+ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/linker.msp430-elf.x<br />+ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/linker.msp430.x<br />- /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/linker.x<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/main.c<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/makefile<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/software/leds/omsp_system.h<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/1_initialize_pmem.sh<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/leds.bit<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/leds.mcs<br />~ /openmsp430/trunk/fpga/xilinx_avnet_lx9microbard/synthesis/xilinx/bitstreams/openMSP430_fpga.bit<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/sim/rtl_sim/bin/msp430sim<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/sim/rtl_sim/bin/rtlsim.sh<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/sim/rtl_sim/run/run_clean<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/sim/rtl_sim/src/submit.f<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/cprintf.c<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/cprintf.h<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/linker.msp430-elf.x<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/linker.msp430.x<br />- /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/linker.x<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/main.c<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/makefile<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/hw_uart/omsp_system.h<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/linker.msp430-elf.x<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/linker.msp430.x<br />- /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/linker.x<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/main.c<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/makefile<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/leds/omsp_system.h<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/cprintf.c<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/cprintf.h<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/hardware.h<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/linker.msp430-elf.x<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/linker.msp430.x<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/main.c<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/makefile<br />+ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/omsp_system.h<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/swuart.h<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/software/ta_uart/swuart.s<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/synthesis/xilinx/1_initialize_pmem.sh<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/synthesis/xilinx/bitstreams/leds.bit<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/synthesis/xilinx/bitstreams/leds.mcs<br />~ /openmsp430/trunk/fpga/xilinx_diligent_s3board/synthesis/xilinx/bitstreams/openMSP430_fpga.bit<br />
olivier.girard
Tue, 17 Nov 2015 11:05:53 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=212
-
Add custom printf function to reduce program memory footprint (the ...
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=211
<div><strong>Rev 211 - olivier.girard</strong> (38 file(s) modified)</div><div>Add custom printf function to reduce program memory footprint (the ...</div>~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/coremark.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/coremark_v1.0.v<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/core_portme.mak<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/linker.msp430.x<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/omsp_func.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/coremark_v1.0/msp430/omsp_func.h<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/omsp_func.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_4mcu/omsp_func.h<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/omsp_func.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/dhrystone_v2.1/omsp_func.h<br />- /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/copydata.c<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/linker.msp430-elf.x<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/makefile<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib/copydata.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib/cprintf.c<br />+ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/mylib/cprintf.h<br />~ /openmsp430/trunk/core/sim/rtl_sim/src-c/sandbox/omsp_system.h<br />
olivier.girard
Tue, 17 Nov 2015 11:03:44 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=211
-
Add support for both MSPGCC and TI/RH-GCC toolchains. Add detection ...
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=210
<div><strong>Rev 210 - olivier.girard</strong> (6 file(s) modified)</div><div>Add support for both MSPGCC and TI/RH-GCC toolchains. Add detection ...</div>~ /openmsp430/trunk/tools/bin/openmsp430-gdbproxy.tcl<br />~ /openmsp430/trunk/tools/bin/openmsp430-loader.tcl<br />~ /openmsp430/trunk/tools/bin/openmsp430-minidebug.tcl<br />- /openmsp430/trunk/tools/bin/README.TXT<br />~ /openmsp430/trunk/tools/lib/tcl-lib/dbg_functions.tcl<br />~ /openmsp430/trunk/tools/lib/tcl-lib/dbg_utils.tcl<br />
olivier.girard
Tue, 17 Nov 2015 09:57:08 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=210
-
Update ChangeLogs
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=209
<div><strong>Rev 209 - olivier.girard</strong> (2 file(s) modified)</div><div>Update ChangeLogs</div>~ /openmsp430/trunk/ChangeLog_core.txt<br />~ /openmsp430/trunk/ChangeLog_tools.txt<br />
olivier.girard
Tue, 20 Oct 2015 21:01:44 +0100
https://opencores.org/websvn//websvn/revision?repname=openmsp430&path=%2F&rev=209
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