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s1_core WebSVN RSS feed - s1_core https://opencores.org/websvn//websvn/listing?repname=s1_core&path=%2F& Tue, 14 Apr 2026 12:55:08 +0100 FeedCreator 1.7.2 Change ownership https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=114 <div><strong>Rev 114 - albert.watson</strong> (38 file(s) modified)</div><div>Change ownership</div>~ /s1_core/trunk/docs/INSTALL.txt<br />~ /s1_core/trunk/docs/LICENSE.txt<br />~ /s1_core/trunk/docs/other/ACCESSES.txt<br />~ /s1_core/trunk/docs/other/BLOCKS.txt<br />~ /s1_core/trunk/docs/README.txt<br />~ /s1_core/trunk/docs/REQUIREMENTS.txt<br />~ /s1_core/trunk/docs/SIMULATION.txt<br />~ /s1_core/trunk/docs/SPEC.txt<br />~ /s1_core/trunk/docs/SUPPORT.txt<br />~ /s1_core/trunk/docs/SYNTHESIS.txt<br />~ /s1_core/trunk/docs/TODO.txt<br />~ /s1_core/trunk/docs/UPDATING.txt<br />~ /s1_core/trunk/hdl/behav/testbench/mem_harness.v<br />~ /s1_core/trunk/hdl/behav/testbench/s1_defs.h<br />~ /s1_core/trunk/hdl/behav/testbench/testbench.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/cachedir.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/int_ctrl.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/os2wb.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/pcx_fifo.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/rst_ctrl.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/s1_defs.h<br />~ /s1_core/trunk/hdl/rtl/s1_top/s1_top.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/simple_fifo.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/spc2wbm.v<br />~ /s1_core/trunk/tests/boot/boot.s<br />~ /s1_core/trunk/tools/bin/compile_test<br />~ /s1_core/trunk/tools/bin/tar_env<br />~ /s1_core/trunk/tools/bin/tracan.sh<br />~ /s1_core/trunk/tools/bin/update_sparccore<br />~ /s1_core/trunk/tools/src/bw_r_dcd.v<br />~ /s1_core/trunk/tools/src/bw_r_icd.v<br />~ /s1_core/trunk/tools/src/bw_r_idct.v<br />~ /s1_core/trunk/tools/src/sourceme<br />~ /s1_core/trunk/tools/src/tracan.cpp<br />~ /s1_core/trunk/tools/src/tracan.h<br />~ /s1_core/trunk/tools/src/TRACAN.txt<br />~ /s1_core/trunk/tools/src/waves_s1.gtkw<br />~ /s1_core/trunk/tools/src/waves_t1.gtkw<br /> albert.watson Sat, 10 Mar 2018 11:45:05 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=114 S1_Core: Attempt to merge some long time changes Fab had ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=113 <div><strong>Rev 113 - albert.watson</strong> (178 file(s) modified)</div><div>S1_Core: Attempt to merge some long time changes Fab had ...</div>- /s1_core/trunk/hdl/behav/sparc_libs<br />~ /s1_core/trunk/hdl/behav/testbench/mem_harness.v<br />~ /s1_core/trunk/hdl/behav/testbench/testbench.v<br />~ /s1_core/trunk/hdl/filelist.dc<br />~ /s1_core/trunk/hdl/filelist.fpga<br />~ /s1_core/trunk/hdl/filelist.icarus<br />~ /s1_core/trunk/hdl/filelist.vcs<br />~ /s1_core/trunk/hdl/filelist.xst<br />+ /s1_core/trunk/hdl/rtl/s1_top/cachedir.v<br />+ /s1_core/trunk/hdl/rtl/s1_top/os2wb.v<br />+ /s1_core/trunk/hdl/rtl/s1_top/pcx_fifo.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/s1_top.v<br />+ /s1_core/trunk/hdl/rtl/s1_top/simple_fifo.v<br />~ /s1_core/trunk/hdl/rtl/s1_top/spc2wbm.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_dcd.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_frf.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_icd.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_idct.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_irf.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_irf_register.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_rf16x32.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_rf16x160.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_rf32x80.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_rf32x152b.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_scm.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/bw_r_tlb.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/cluster_header.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/cmp_sram_redhdr.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/cpx_spc_buf.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/cpx_spc_rpt.v<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include/ifu.h<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include/iop.h<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include/lsu.h<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include/sys.h<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include/sys_paths.h<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include/tlu.h<br />+ /s1_core/trunk/hdl/rtl/sparc_core/include/xst_defines.h<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_asi_decode.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_dcache_lfsr.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_dcdp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_dctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_dctldp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_excpctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_pcx_qmon.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_qctl1.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_qctl2.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_qdp1.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_qdp2.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_rrobin_picker2.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_stb_ctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_stb_ctldp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_stb_rwctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_stb_rwdp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_tagdp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/lsu_tlbdp.v<br />+ /s1_core/trunk/hdl/rtl/sparc_core/m1_lib.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/mul64.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_alu.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_aluaddsub.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_byp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_byp_eccgen.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_div.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_div_yreg.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_ecc.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_ecl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_eclccr.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_ecl_cnt6.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_ecl_divcntl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_ecl_eccctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_ecl_mdqctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_ecl_wb.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_reg.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_rml.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_rml_cwp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_exu_rndrob.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ffu.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ffu_ctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ffu_ctl_visctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ffu_dp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_ctr5.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_dcl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_dec.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_errctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_errdp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_fcl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_fdp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_ifqctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_ifqdp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_imd.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_invctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_lfsr5.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_lru4.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_mbist.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_milfsm.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_rndrob.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_sscan.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_swl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_thrcmpl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_thrfsm.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_ifu_wseldp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_mul_dp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_mul_top.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_tlu_intctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/sparc_tlu_intdp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/swrvr_clib.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/swrvr_dlib.v<br />- /s1_core/trunk/hdl/rtl/sparc_core/synchronizer_asr.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_addern_32.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_hyperv.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_incr64.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_misctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_mmu_ctl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_mmu_dp.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_pib.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_prencoder16.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_rrobin_picker.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_tcl.v<br />~ /s1_core/trunk/hdl/rtl/sparc_core/tlu_tdp.v<br />+ /s1_core/trunk/hdl/rtl/sparc_core/u1_lib.v<br />+ /s1_core/trunk/opt<br />+ /s1_core/trunk/opt/grlib-niagara-1.1.0.tar.gz<br />+ /s1_core/trunk/opt/s1_core_ahb.tgz<br />~ /s1_core/trunk/sourceme<br />+ /s1_core/trunk/tests/boot.s.NEW<br />+ /s1_core/trunk/tests/boot/boot.bin<br />+ /s1_core/trunk/tests/boot/boot.dump<br />+ /s1_core/trunk/tests/boot/rom_harness.dis<br />+ /s1_core/trunk/tests/boot/rom_harness.hex<br />+ /s1_core/trunk/tests/boot/tmp<br />+ /s1_core/trunk/tests/boot/tmp/boot.bin<br />+ /s1_core/trunk/tests/boot/tmp/boot.hex<br />+ /s1_core/trunk/tests/boot/tmp/boot.ihex<br />+ /s1_core/trunk/tests/boot/tmp/memory.dis<br />+ /s1_core/trunk/tests/hello.bin<br />+ /s1_core/trunk/tests/hello.dump<br />+ /s1_core/trunk/tests/hello.o<br />+ /s1_core/trunk/tests/nop.txt<br />+ /s1_core/trunk/tests/nop_ram_harness.hex<br />+ /s1_core/trunk/tests/nop_rom_harness.hex<br />+ /s1_core/trunk/tests/openboot<br />+ /s1_core/trunk/tests/openboot/1c1t_obp_prom.bin<br />+ /s1_core/trunk/tests/openboot/1c1t_prom.bin<br />+ /s1_core/trunk/tests/openboot/1c4t_obp_prom.bin<br />+ /s1_core/trunk/tests/openboot/1c4t_prom.bin<br />+ /s1_core/trunk/tests/openboot/2c1t_obp_prom.bin<br />+ /s1_core/trunk/tests/openboot/2c1t_prom.bin<br />+ /s1_core/trunk/tests/openboot/2c4t_obp_prom.bin<br />+ /s1_core/trunk/tests/openboot/2c4t_prom.bin<br />+ /s1_core/trunk/tests/openboot/dis<br />+ /s1_core/trunk/tests/openboot/dis/1c1t_obp_prom.dis<br />+ /s1_core/trunk/tests/openboot/dis/1c1t_obp_prom.dis.bis<br />+ /s1_core/trunk/tests/openboot/dis/1c1t_obp_prom.elf<br />+ /s1_core/trunk/tests/openboot/dis/1c1t_prom.dis<br />+ /s1_core/trunk/tests/openboot/dis/1c1t_prom.elf<br />+ /s1_core/trunk/tests/openboot/dis/README.txt<br />+ /s1_core/trunk/tests/openboot/README.txt<br />+ /s1_core/trunk/tests/ram_harness.dis<br />+ /s1_core/trunk/tests/ram_harness.hex<br />+ /s1_core/trunk/tests/runme.sh<br />~ /s1_core/trunk/tools/bin/compile_test<br />+ /s1_core/trunk/tools/bin/opcode2disass.sh<br />~ /s1_core/trunk/tools/bin/s1_sim_build<br />~ /s1_core/trunk/tools/bin/s1_sim_run<br />+ /s1_core/trunk/tools/bin/tracan.sh<br />+ /s1_core/trunk/tools/bin/tracan_compile.sh<br />~ /s1_core/trunk/tools/bin/update_sparccore<br />- /s1_core/trunk/tools/opt<br />- /s1_core/trunk/tools/src/gtkwave.sav<br />+ /s1_core/trunk/tools/src/tracan.cpp<br />+ /s1_core/trunk/tools/src/tracan.h<br />+ /s1_core/trunk/tools/src/TRACAN.txt<br />+ /s1_core/trunk/tools/src/waves_s1.gtkw<br />+ /s1_core/trunk/tools/src/waves_t1.gtkw<br /> albert.watson Sun, 07 May 2017 15:08:04 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=113 Slightly improved version of boot code as outlined by Emanuele ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=112 <div><strong>Rev 112 - albert.watson</strong> (1 file(s) modified)</div><div>Slightly improved version of boot code as outlined by Emanuele ...</div>~ /s1_core/trunk/tests/boot/boot.s<br /> albert.watson Mon, 01 Oct 2012 22:05:26 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=112 ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=111 <div><strong>Rev 111 - albert.watson</strong> (15 file(s) modified)</div><div>...</div>~ /s1_core/trunk/docs/INSTALL.txt<br />~ /s1_core/trunk/docs/README.txt<br />~ /s1_core/trunk/docs/REQUIREMENTS.txt<br />~ /s1_core/trunk/docs/SIMULATION.txt<br />~ /s1_core/trunk/docs/SYNTHESIS.txt<br />~ /s1_core/trunk/hdl/filelist.dc<br />~ /s1_core/trunk/hdl/filelist.fpga<br />~ /s1_core/trunk/hdl/filelist.icarus<br />~ /s1_core/trunk/hdl/filelist.vcs<br />~ /s1_core/trunk/hdl/filelist.xst<br />/s1_core/trunk/README.txt<br />~ /s1_core/trunk/sourceme<br />~ /s1_core/trunk/tools/bin/s1_sim_build<br />+ /s1_core/trunk/tools/bin/s1_sim_run<br />~ /s1_core/trunk/tools/bin/s1_synth<br /> albert.watson Sat, 09 Jun 2012 18:23:22 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=111 Reduced the number of scripts, just one for sim and ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=110 <div><strong>Rev 110 - albert.watson</strong> (8 file(s) modified)</div><div>Reduced the number of scripts, just one for sim and ...</div>- /s1_core/trunk/tools/bin/build_dc<br />- /s1_core/trunk/tools/bin/build_fpga<br />- /s1_core/trunk/tools/bin/build_icarus<br />- /s1_core/trunk/tools/bin/build_vcs<br />- /s1_core/trunk/tools/bin/build_xst<br />+ /s1_core/trunk/tools/bin/s1_sim_build<br />+ /s1_core/trunk/tools/bin/s1_synth<br />+ /s1_core/trunk/tools/bin/test_var<br /> albert.watson Sat, 09 Jun 2012 17:55:26 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=110 Started working on scripts. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=109 <div><strong>Rev 109 - albert.watson</strong> (13 file(s) modified)</div><div>Started working on scripts.</div>~ /s1_core/trunk/tools/bin/build_dc<br />~ /s1_core/trunk/tools/bin/build_fpga<br />~ /s1_core/trunk/tools/bin/build_icarus<br />~ /s1_core/trunk/tools/bin/build_vcs<br />~ /s1_core/trunk/tools/bin/build_xst<br />~ /s1_core/trunk/tools/bin/clean_env<br />~ /s1_core/trunk/tools/bin/compile_test<br />~ /s1_core/trunk/tools/bin/run_icarus<br />~ /s1_core/trunk/tools/bin/run_vcs<br />~ /s1_core/trunk/tools/bin/tar_env<br />~ /s1_core/trunk/tools/bin/update_filelist<br />~ /s1_core/trunk/tools/bin/update_macrocell<br />~ /s1_core/trunk/tools/bin/update_sparccore<br /> albert.watson Sat, 09 Jun 2012 16:02:36 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=109 Added 'trunk' to S1 root dir https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=108 <div><strong>Rev 108 - fafa1971</strong> (1 file(s) modified)</div><div>Added 'trunk' to S1 root dir</div>~ /s1_core/trunk/sourceme<br /> fafa1971 Tue, 19 May 2009 10:31:22 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=108 Added old uploaded documents to new repository. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=107 <div><strong>Rev 107 - root</strong> (5 file(s) modified)</div><div>Added old uploaded documents to new repository.</div>- /s1_core/web_uploads/oc_checkin.sh<br />- /s1_core/web_uploads/oc_cvs_checkin.sh<br />- /s1_core/web_uploads/svn_checkin.log<br />- /s1_core/web_uploads/svn_checkin.sh<br />- /s1_core/web_uploads/temp.sh<br /> root Tue, 10 Mar 2009 15:19:25 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=107 Added old uploaded documents to new repository. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=106 <div><strong>Rev 106 - root</strong> (5 file(s) modified)</div><div>Added old uploaded documents to new repository.</div>+ /s1_core/web_uploads/oc_checkin.sh<br />+ /s1_core/web_uploads/oc_cvs_checkin.sh<br />+ /s1_core/web_uploads/svn_checkin.log<br />+ /s1_core/web_uploads/svn_checkin.sh<br />+ /s1_core/web_uploads/temp.sh<br /> root Tue, 10 Mar 2009 09:07:07 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=106 New directory structure. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=105 <div><strong>Rev 105 - root</strong> (8 file(s) modified)</div><div>New directory structure.</div>- /branches<br />+ /s1_core<br />+ /s1_core/branches<br />+ /s1_core/tags<br />+ /s1_core/trunk<br />+ /s1_core/web_uploads<br />- /tags<br />- /trunk<br /> root Tue, 10 Mar 2009 09:06:37 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=105 File no longer in use https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=104 <div><strong>Rev 104 - fafa1971</strong> (10 file(s) modified)</div><div>File no longer in use</div>- /trunk/tests/boot/mem_HPRIV_RESET.image<br />- /trunk/tests/boot/mem_HTRAPS.image<br />- /trunk/tests/boot/mem_KERNEL_data.image<br />- /trunk/tests/boot/mem_KERNEL_text.image<br />- /trunk/tests/boot/mem_MAIN.image<br />- /trunk/tests/boot/mem_RED_EXT_SEC.image<br />- /trunk/tests/boot/mem_RED_EXT_SEC.image_ORIGINAL<br />- /trunk/tests/boot/mem_RED_SEC.image<br />- /trunk/tests/boot/mem_TRAPS.image<br />- /trunk/tests/dump<br /> fafa1971 Wed, 03 Dec 2008 13:52:34 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=104 Changed almost everything to make our boot code work. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=103 <div><strong>Rev 103 - fafa1971</strong> (19 file(s) modified)</div><div>Changed almost everything to make our boot code work.</div>~ /trunk/hdl/behav/testbench/testbench.v<br />~ /trunk/hdl/filelist.dc<br />~ /trunk/hdl/filelist.fpga<br />~ /trunk/hdl/filelist.icarus<br />~ /trunk/hdl/filelist.vcs<br />~ /trunk/hdl/filelist.xst<br />~ /trunk/hdl/rtl/sparc_core/sparc.v<br />~ /trunk/hdl/rtl/sparc_core/sparc_ifu.v<br />~ /trunk/hdl/rtl/sparc_core/sparc_ifu_fcl.v<br />~ /trunk/hdl/rtl/sparc_core/sparc_ifu_swl.v<br />~ /trunk/hdl/rtl/sparc_core/sparc_ifu_thrcmpl.v<br />~ /trunk/sourceme<br />~ /trunk/tests/boot/boot.s<br />~ /trunk/tests/boot/mem_RED_EXT_SEC.image<br />~ /trunk/tests/boot/mem_RED_SEC.image<br />~ /trunk/tools/bin/compile_test<br />~ /trunk/tools/bin/run_icarus<br />~ /trunk/tools/src/dump2hex.c<br />~ /trunk/tools/src/linker.map<br /> fafa1971 Wed, 03 Dec 2008 12:15:54 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=103 This version correctly initializes the SPARC Core and then jumps ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=102 <div><strong>Rev 102 - fafa1971</strong> (1 file(s) modified)</div><div>This version correctly initializes the SPARC Core and then jumps ...</div>~ /trunk/tests/boot/boot.s<br /> fafa1971 Tue, 02 Dec 2008 21:09:21 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=102 Should assign all the 4 bits of completion signal the ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=101 <div><strong>Rev 101 - fafa1971</strong> (1 file(s) modified)</div><div>Should assign all the 4 bits of completion signal the ...</div>~ /trunk/tools/bin/update_sparccore<br /> fafa1971 Fri, 28 Nov 2008 15:23:01 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=101 SPU removed by hand. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=100 <div><strong>Rev 100 - fafa1971</strong> (1 file(s) modified)</div><div>SPU removed by hand.</div>~ /trunk/tools/src/sparc.v<br /> fafa1971 Fri, 28 Nov 2008 14:53:55 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=100 This bridge follows the rules stated in paragraph 6.8 of ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=99 <div><strong>Rev 99 - fafa1971</strong> (1 file(s) modified)</div><div>This bridge follows the rules stated in paragraph 6.8 of ...</div>~ /trunk/hdl/rtl/s1_top/spc2wbm.v<br /> fafa1971 Thu, 27 Nov 2008 22:00:00 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=99 Added stall/resume signals from bridge to SPARC Core. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=98 <div><strong>Rev 98 - fafa1971</strong> (1 file(s) modified)</div><div>Added stall/resume signals from bridge to SPARC Core.</div>~ /trunk/hdl/rtl/s1_top/s1_top.v<br /> fafa1971 Thu, 27 Nov 2008 21:28:40 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=98 Changed hack to insert stall signal into the core (following ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=97 <div><strong>Rev 97 - fafa1971</strong> (1 file(s) modified)</div><div>Changed hack to insert stall signal into the core (following ...</div>~ /trunk/tools/bin/update_sparccore<br /> fafa1971 Thu, 27 Nov 2008 21:25:55 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=97 File lists with updated SPARC Core code. https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=96 <div><strong>Rev 96 - fafa1971</strong> (5 file(s) modified)</div><div>File lists with updated SPARC Core code.</div>~ /trunk/hdl/filelist.dc<br />~ /trunk/hdl/filelist.fpga<br />~ /trunk/hdl/filelist.icarus<br />~ /trunk/hdl/filelist.vcs<br />~ /trunk/hdl/filelist.xst<br /> fafa1971 Wed, 12 Nov 2008 16:08:02 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=96 Files from OpenSPARCT1.1.6 with the SPU instance removed from the ... https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=95 <div><strong>Rev 95 - fafa1971</strong> (131 file(s) modified)</div><div>Files from OpenSPARCT1.1.6 with the SPU instance removed from the ...</div>+ /trunk/hdl/rtl/sparc_core<br />+ /trunk/hdl/rtl/sparc_core/bw_clk_cl_sparc_cmp.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_dcd.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_frf.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_icd.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_idct.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_irf.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_irf_register.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_rf16x32.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_rf16x160.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_rf32x80.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_rf32x152b.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_scm.v<br />+ /trunk/hdl/rtl/sparc_core/bw_r_tlb.v<br />+ /trunk/hdl/rtl/sparc_core/cluster_header.v<br />+ /trunk/hdl/rtl/sparc_core/cmp_sram_redhdr.v<br />+ /trunk/hdl/rtl/sparc_core/cpx_spc_buf.v<br />+ /trunk/hdl/rtl/sparc_core/cpx_spc_rpt.v<br />+ /trunk/hdl/rtl/sparc_core/lsu.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_asi_decode.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_dcache_lfsr.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_dcdp.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_dctl.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_dctldp.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_dc_parity_gen.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_excpctl.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_pcx_qmon.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_qctl1.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_qctl2.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_qdp1.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_qdp2.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_rrobin_picker2.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_stb_ctl.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_stb_ctldp.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_stb_rwctl.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_stb_rwdp.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_tagdp.v<br />+ /trunk/hdl/rtl/sparc_core/lsu_tlbdp.v<br />+ /trunk/hdl/rtl/sparc_core/mul64.v<br />+ /trunk/hdl/rtl/sparc_core/sparc.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_alu.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_aluadder64.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_aluaddsub.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_alulogic.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_aluor32.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_aluspr.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_aluzcmp64.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_alu_16eql.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_byp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_byp_eccgen.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_div.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_div_32eql.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_div_yreg.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecc.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecc_dec.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_eclbyplog.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_eclbyplog_rs1.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_eclccr.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_eclcomp7.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecl_cnt6.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecl_divcntl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecl_eccctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecl_mdqctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_ecl_wb.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_reg.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_rml.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_rml_cwp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_rml_inc3.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_rndrob.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_exu_shft.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ffu.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ffu_ctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ffu_ctl_visctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ffu_dp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ffu_part_add32.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ffu_vis.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_cmp35.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_ctr5.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_dcl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_dec.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_errctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_errdp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_fcl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_fdp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_ifqctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_ifqdp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_imd.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_incr46.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_invctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_lfsr5.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_lru4.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_mbist.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_milfsm.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_par16.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_par32.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_par34.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_rndrob.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_sscan.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_swl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_swpla.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_thrcmpl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_thrfsm.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_ifu_wseldp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_mul_cntl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_mul_dp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_mul_top.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_tlu_dec64.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_tlu_intctl.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_tlu_intdp.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_tlu_penc64.v<br />+ /trunk/hdl/rtl/sparc_core/sparc_tlu_zcmp64.v<br />+ /trunk/hdl/rtl/sparc_core/swrvr_clib.v<br />+ /trunk/hdl/rtl/sparc_core/swrvr_dlib.v<br />+ /trunk/hdl/rtl/sparc_core/synchronizer_asr.v<br />+ /trunk/hdl/rtl/sparc_core/test_stub_bist.v<br />+ /trunk/hdl/rtl/sparc_core/test_stub_scan.v<br />+ /trunk/hdl/rtl/sparc_core/tlu.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_addern_32.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_hyperv.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_incr64.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_misctl.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_mmu_ctl.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_mmu_dp.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_pib.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_prencoder16.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_rrobin_picker.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_tcl.v<br />+ /trunk/hdl/rtl/sparc_core/tlu_tdp.v<br /> fafa1971 Wed, 12 Nov 2008 16:02:09 +0100 https://opencores.org/websvn//websvn/revision?repname=s1_core&path=%2F&rev=95
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