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sdram_controller WebSVN RSS feed - sdram_controller https://opencores.org/websvn//websvn/listing?repname=sdram_controller&path=%2F& Tue, 25 Aug 2026 00:11:26 +0100 FeedCreator 1.7.2 Updating the .xise project file for Magnus https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=24 <div><strong>Rev 24 - lynn0p</strong> (1 file(s) modified)</div><div>Updating the .xise project file for Magnus</div>~ /sdram_controller/trunk/boards/Microblaze1600E/Microblaze1600E.xise<br /> lynn0p Sun, 11 Oct 2009 15:03:42 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=24 Adding Magnus' UCF and project config https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=23 <div><strong>Rev 23 - lynn0p</strong> (3 file(s) modified)</div><div>Adding Magnus' UCF and project config</div>+ /sdram_controller/trunk/boards/Microblaze1600E<br />+ /sdram_controller/trunk/boards/Microblaze1600E/Microblaze1600E.ucf<br />+ /sdram_controller/trunk/boards/Microblaze1600E/Microblaze1600E.xise<br /> lynn0p Fri, 09 Oct 2009 14:43:25 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=23 Testbench was &quot;broken&quot; when I fixed controller for my ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=22 <div><strong>Rev 22 - lynn0p</strong> (1 file(s) modified)</div><div>Testbench was &quot;broken&quot; when I fixed controller for my ...</div>~ /sdram_controller/trunk/scratch.vhd<br /> lynn0p Thu, 08 Oct 2009 23:48:50 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=22 1. Updated testbench to reflect lack of en signal 2. Deleted ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=21 <div><strong>Rev 21 - lynn0p</strong> (6 file(s) modified)</div><div>1. Updated testbench to reflect lack of en signal<br /> 2. Deleted ...</div>+ /sdram_controller/trunk/boards<br />+ /sdram_controller/trunk/boards/StarterKit500E<br />+ /sdram_controller/trunk/boards/StarterKit500E/scratch.ucf<br />+ /sdram_controller/trunk/boards/StarterKit500E/SDRAM_TB.xise<br />~ /sdram_controller/trunk/scratch.vhd<br />- /sdram_controller/trunk/Xilinx_ISE_11.1_project.tar.gz<br /> lynn0p Thu, 08 Oct 2009 22:43:04 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=21 Got rid of the en signal, minor changes to eliminate ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=20 <div><strong>Rev 20 - lynn0p</strong> (1 file(s) modified)</div><div>Got rid of the en signal, minor changes to eliminate ...</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Wed, 07 Oct 2009 03:24:02 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=20 Fix for the transparent latch warning. Z80 call stack pointer ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=19 <div><strong>Rev 19 - lynn0p</strong> (1 file(s) modified)</div><div>Fix for the transparent latch warning. Z80 call stack pointer ...</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Wed, 07 Oct 2009 02:03:40 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=19 Forgot to update the comments https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=18 <div><strong>Rev 18 - lynn0p</strong> (1 file(s) modified)</div><div>Forgot to update the comments</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Mon, 05 Oct 2009 23:14:13 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=18 When I moved the z80 callstack pointer into SDRAM from ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=17 <div><strong>Rev 17 - lynn0p</strong> (1 file(s) modified)</div><div>When I moved the z80 callstack pointer into SDRAM from ...</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Mon, 05 Oct 2009 23:12:15 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=17 Removed a redundant cap_en https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=16 <div><strong>Rev 16 - lynn0p</strong> (1 file(s) modified)</div><div>Removed a redundant cap_en</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Sat, 03 Oct 2009 17:44:10 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=16 - Adding a convenience project for building the testbench. - Must ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=15 <div><strong>Rev 15 - lynn0p</strong> (1 file(s) modified)</div><div>- Adding a convenience project for building the testbench.<br /> - Must ...</div>+ /sdram_controller/trunk/Xilinx_ISE_11.1_project.tar.gz<br /> lynn0p Sat, 03 Oct 2009 00:48:18 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=15 Changed the clock period in the DCM generic to match ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=14 <div><strong>Rev 14 - lynn0p</strong> (1 file(s) modified)</div><div>Changed the clock period in the DCM generic to match ...</div>~ /sdram_controller/trunk/scratch.vhd<br /> lynn0p Fri, 02 Oct 2009 21:45:21 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=14 Updated the top level testbench to reflect the fact that ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=13 <div><strong>Rev 13 - lynn0p</strong> (1 file(s) modified)</div><div>Updated the top level testbench to reflect the fact that ...</div>~ /sdram_controller/trunk/scratch.vhd<br /> lynn0p Fri, 02 Oct 2009 20:51:51 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=13 1. rolled write recover clocks back to previous value and ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=12 <div><strong>Rev 12 - lynn0p</strong> (2 file(s) modified)</div><div>1. rolled write recover clocks back to previous value and ...</div>~ /sdram_controller/trunk/sdram.vhd<br />~ /sdram_controller/trunk/sdram_init.vhd<br /> lynn0p Wed, 23 Sep 2009 17:15:09 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=12 consolidated capture into one process and added comments https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=11 <div><strong>Rev 11 - lynn0p</strong> (1 file(s) modified)</div><div>consolidated capture into one process and added comments</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Tue, 22 Sep 2009 21:23:45 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=11 Fixes to more glitches uncovered during testing with my T80 ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=10 <div><strong>Rev 10 - lynn0p</strong> (1 file(s) modified)</div><div>Fixes to more glitches uncovered during testing with my T80 ...</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Tue, 22 Sep 2009 17:17:01 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=10 Got rid of some redundant busy_n &lt;= '0' statements https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=9 <div><strong>Rev 9 - lynn0p</strong> (1 file(s) modified)</div><div>Got rid of some redundant busy_n &lt;= '0' statements</div>~ /sdram_controller/trunk/sdram.vhd<br /> lynn0p Mon, 21 Sep 2009 05:11:59 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=9 Changes made to integrate and test with my homebrew SoC ... https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=8 <div><strong>Rev 8 - lynn0p</strong> (2 file(s) modified)</div><div>Changes made to integrate and test with my homebrew SoC ...</div>~ /sdram_controller/trunk/sdram.vhd<br />~ /sdram_controller/trunk/sdram_support.vhd<br /> lynn0p Mon, 21 Sep 2009 04:56:45 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=8 Reformatted the comments so they fit in 80 columns https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=7 <div><strong>Rev 7 - lynn0p</strong> (3 file(s) modified)</div><div>Reformatted the comments so they fit in 80 columns</div>~ /sdram_controller/trunk/sdram.vhd<br />~ /sdram_controller/trunk/sdram_reader.vhd<br />~ /sdram_controller/trunk/sdram_writer.vhd<br /> lynn0p Sun, 13 Sep 2009 00:04:22 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=7 changes to reduce synthesizer warnings, removed unused signals, etc. https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=6 <div><strong>Rev 6 - lynn0p</strong> (5 file(s) modified)</div><div>changes to reduce synthesizer warnings, removed unused signals, etc.</div>~ /sdram_controller/trunk/scratch.vhd<br />~ /sdram_controller/trunk/sdram.vhd<br />~ /sdram_controller/trunk/sdram_reader.vhd<br />~ /sdram_controller/trunk/sdram_support.vhd<br />~ /sdram_controller/trunk/sdram_writer.vhd<br /> lynn0p Sat, 12 Sep 2009 19:48:24 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=6 added header file for ddr.v https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=5 <div><strong>Rev 5 - lynn0p</strong> (1 file(s) modified)</div><div>added header file for ddr.v</div>+ /sdram_controller/trunk/ddr_parameters.vh<br /> lynn0p Sat, 12 Sep 2009 00:09:09 +0100 https://opencores.org/websvn//websvn/revision?repname=sdram_controller&path=%2F&rev=5
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