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URL https://opencores.org/ocsvn/uart6551/uart6551/trunk

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uart6551 WebSVN RSS feed - uart6551 https://opencores.org/websvn//websvn/listing?repname=uart6551&path=%2F& Sun, 19 Apr 2026 06:44:12 +0100 FeedCreator 1.7.2 - fta bus version https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=13 <div><strong>Rev 13 - robfinch</strong> (4 file(s) modified)</div><div>- fta bus version</div>~ /uart6551/trunk/trunk/rtl/uart6551BaudLUT.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551pci_fta32.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Rx.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Tx.sv<br /> robfinch Wed, 12 Jul 2023 05:30:33 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=13 - change index 3 to 2 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=12 <div><strong>Rev 12 - robfinch</strong> (1 file(s) modified)</div><div>- change index 3 to 2</div>~ /uart6551/trunk/trunk/rtl/pci32_config.sv<br /> robfinch Sun, 26 Feb 2023 03:57:27 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=12 - 256-byte config space https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=11 <div><strong>Rev 11 - robfinch</strong> (4 file(s) modified)</div><div>- 256-byte config space</div>+ /uart6551/trunk/trunk/doc/uart6551pci.docx<br />+ /uart6551/trunk/trunk/doc/uart6551pci.pdf<br />+ /uart6551/trunk/trunk/rtl/pci32_config.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551pci.sv<br /> robfinch Sat, 25 Feb 2023 23:28:26 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=11 - zero output bus when not selected to allow wire-or'ing https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=10 <div><strong>Rev 10 - robfinch</strong> (1 file(s) modified)</div><div>- zero output bus when not selected to allow wire-or'ing</div>~ /uart6551/trunk/trunk/rtl/uart6551.sv<br /> robfinch Sun, 27 Nov 2022 18:09:26 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=10 - 100 MHz baud table - transmitter timing https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=9 <div><strong>Rev 9 - robfinch</strong> (3 file(s) modified)</div><div>- 100 MHz baud table<br /> - transmitter timing</div>~ /uart6551/trunk/trunk/rtl/uart6551.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551BaudLUT.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Tx.sv<br /> robfinch Wed, 23 Nov 2022 05:02:18 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=9 - remove positional parameters https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=8 <div><strong>Rev 8 - robfinch</strong> (5 file(s) modified)</div><div>- remove positional parameters</div>~ /uart6551/trunk/trunk/rtl/uart6551.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551BaudLUT.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Fifo.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Rx.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Tx.sv<br /> robfinch Tue, 22 Nov 2022 11:39:07 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=8 - added synchronous bus interface for top level https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=7 <div><strong>Rev 7 - robfinch</strong> (3 file(s) modified)</div><div>- added synchronous bus interface for top level</div>+ /uart6551/trunk/trunk/doc/uart6551sbi.docx<br />+ /uart6551/trunk/trunk/doc/uart6551sbi.pdf<br />+ /uart6551/trunk/trunk/rtl/uart6551sbi.sv<br /> robfinch Wed, 03 Aug 2022 02:42:00 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=7 - updated to use vendor fifo's https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=6 <div><strong>Rev 6 - robfinch</strong> (4 file(s) modified)</div><div>- updated to use vendor fifo's</div>~ /uart6551/trunk/trunk/rtl/uart6551BaudLUT.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Rx_x12.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Tx_x12.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551_x12.sv<br /> robfinch Tue, 25 Jan 2022 06:48:01 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=6 - added 12-bit version https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=5 <div><strong>Rev 5 - robfinch</strong> (8 file(s) modified)</div><div>- added 12-bit version</div>+ /uart6551/trunk/trunk/doc/uart6551x12_WBC.txt<br />+ /uart6551/trunk/trunk/doc/uart6551_x12.docx<br />+ /uart6551/trunk/trunk/doc/uart6551_x12.pdf<br />+ /uart6551/trunk/trunk/rtl/uart6551Rx_x12.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551Tx_x12.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551_x12.sv<br />~ /uart6551/trunk/trunk/software/README.md<br />+ /uart6551/trunk/trunk/software/serial.asm<br /> robfinch Sat, 15 Jan 2022 03:33:43 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=5 - fix count https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=4 <div><strong>Rev 4 - robfinch</strong> (1 file(s) modified)</div><div>- fix count</div>~ /uart6551/trunk/trunk/rtl/uart6551Fifo.sv<br /> robfinch Sat, 11 Sep 2021 03:04:23 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=4 - improve operation with fifo's disabled https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=3 <div><strong>Rev 3 - robfinch</strong> (3 file(s) modified)</div><div>- improve operation with fifo's disabled</div>~ /uart6551/trunk/trunk/rtl/uart6551.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Rx.sv<br />~ /uart6551/trunk/trunk/rtl/uart6551Tx.sv<br /> robfinch Sat, 20 Jul 2019 06:32:16 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=3 ... https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=2 <div><strong>Rev 2 - robfinch</strong> (22 file(s) modified)</div><div>...</div>+ /uart6551/trunk/README.md<br />+ /uart6551/trunk/trunk<br />+ /uart6551/trunk/trunk/doc<br />+ /uart6551/trunk/trunk/doc/gpl.txt<br />+ /uart6551/trunk/trunk/doc/lgpl.txt<br />+ /uart6551/trunk/trunk/doc/termout.png<br />+ /uart6551/trunk/trunk/doc/uart6551.docx<br />+ /uart6551/trunk/trunk/doc/uart6551.pdf<br />+ /uart6551/trunk/trunk/doc/uart6551.txt<br />+ /uart6551/trunk/trunk/rtl<br />+ /uart6551/trunk/trunk/rtl/ack_gen.v<br />+ /uart6551/trunk/trunk/rtl/edge_det.v<br />+ /uart6551/trunk/trunk/rtl/ready_gen.v<br />+ /uart6551/trunk/trunk/rtl/uart6551.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551BaudLUT.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551Fifo.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551Rx.sv<br />+ /uart6551/trunk/trunk/rtl/uart6551Tx.sv<br />+ /uart6551/trunk/trunk/rtl/vtdl.sv<br />+ /uart6551/trunk/trunk/software<br />+ /uart6551/trunk/trunk/software/README.md<br />+ /uart6551/trunk/trunk/software/uart6551demo.asm<br /> robfinch Sat, 13 Jul 2019 13:16:18 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=2 The project and the structure was created https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=1 <div><strong>Rev 1 - root</strong> (4 file(s) modified)</div><div>The project and the structure was created</div>+ /uart6551<br />+ /uart6551/branches<br />+ /uart6551/tags<br />+ /uart6551/trunk<br /> root Sat, 13 Jul 2019 10:00:03 +0100 https://opencores.org/websvn//websvn/revision?repname=uart6551&path=%2F&rev=1

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