URL
https://opencores.org/ocsvn/minsoc/minsoc/trunk
Error creating feed file, please check write permissions.
minsoc
WebSVN RSS feed - minsoc
https://opencores.org/websvn//websvn/listing?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&
Wed, 10 Jun 2026 10:54:26 +0100
FeedCreator 1.7.2
-
Installation script has an option for advanced or resumed installation. ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=168
<div><strong>Rev 168 - rfajardo</strong> (3 file(s) modified)</div><div>Installation script has an option for advanced or resumed installation. ...</div>~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/utils/setup/minsoc-install.sh<br />
rfajardo
Sun, 10 Jun 2012 12:43:42 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=168
-
Board contribution: nexys2_1200 (Thanks to Johan ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=165
<div><strong>Rev 165 - rfajardo</strong> (9 file(s) modified)</div><div>Board contribution: nexys2_1200 (Thanks to Johan Granath)<br />
<br />
spartan3e_starter_kit_eth/minsoc_bench_defines.v: deprecated definition updated</div>+ /minsoc/trunk/backend/nexys2_1200<br />+ /minsoc/trunk/backend/nexys2_1200/board.h<br />+ /minsoc/trunk/backend/nexys2_1200/configure<br />+ /minsoc/trunk/backend/nexys2_1200/gcc-opt.mk<br />+ /minsoc/trunk/backend/nexys2_1200/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/nexys2_1200/minsoc_defines.v<br />+ /minsoc/trunk/backend/nexys2_1200/nexys2_1200.ucf<br />+ /minsoc/trunk/backend/nexys2_1200/orp.ld<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_bench_defines.v<br />
rfajardo
Fri, 06 Apr 2012 09:31:49 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=165
-
Adding de2_115_board port, thanks to Richard Hasha.
Support to JSP (JTAG ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=158
<div><strong>Rev 158 - rfajardo</strong> (46 file(s) modified)</div><div>Adding de2_115_board port, thanks to Richard Hasha.<br />
<br />
Support to JSP (JTAG ...</div>~ /minsoc/trunk/backend/altera_3c25_board/board.h<br />~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/altera_3c25_board/minsoc_defines.v<br />+ /minsoc/trunk/backend/de2_115_board<br />+ /minsoc/trunk/backend/de2_115_board/board.h<br />+ /minsoc/trunk/backend/de2_115_board/configure<br />+ /minsoc/trunk/backend/de2_115_board/de2_115_board.ucf<br />+ /minsoc/trunk/backend/de2_115_board/gcc-opt.mk<br />+ /minsoc/trunk/backend/de2_115_board/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/de2_115_board/minsoc_defines.v<br />+ /minsoc/trunk/backend/de2_115_board/orp.ld<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/board.h<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/board.h<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/board.h<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/spartan3e_starter_kit_eth.ucf<br />~ /minsoc/trunk/backend/std/board.h<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/backend/std/minsoc_defines.v<br />~ /minsoc/trunk/backend/ug257/board.h<br />~ /minsoc/trunk/backend/ug257/configure<br />~ /minsoc/trunk/backend/ug257/minsoc_defines.v<br />~ /minsoc/trunk/prj/src/adbg_top.prj<br />~ /minsoc/trunk/prj/src/minsoc_top.prj<br />+ /minsoc/trunk/rtl/verilog/interconnect_defines.v<br />~ /minsoc/trunk/rtl/verilog/minsoc_top.v<br />~ /minsoc/trunk/sw/drivers/can.c<br />~ /minsoc/trunk/sw/drivers/eth.c<br />~ /minsoc/trunk/sw/drivers/i2c.c<br />+ /minsoc/trunk/sw/drivers/interconnect.h<br />~ /minsoc/trunk/sw/drivers/uart.c<br />~ /minsoc/trunk/sw/drivers/uart.h<br />~ /minsoc/trunk/sw/eth/eth.c<br />~ /minsoc/trunk/sw/eth/Makefile<br />+ /minsoc/trunk/sw/jsp<br />+ /minsoc/trunk/sw/jsp/jsp.c<br />+ /minsoc/trunk/sw/jsp/Makefile<br />~ /minsoc/trunk/sw/uart/Makefile<br />~ /minsoc/trunk/sw/uart/uart.c<br />~ /minsoc/trunk/utils/setup/configure.sh<br />~ /minsoc/trunk/utils/setup/minsoc-install.sh<br />
rfajardo
Thu, 05 Jan 2012 19:32:03 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=158
-
Updating configure scripts. Calling make into the right directories now.
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=144
<div><strong>Rev 144 - rfajardo</strong> (5 file(s) modified)</div><div>Updating configure scripts. Calling make into the right directories now.</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />
rfajardo
Tue, 22 Nov 2011 11:03:57 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=144
-
Updating configure.sh:
1) we don't patch ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=142
<div><strong>Rev 142 - rfajardo</strong> (6 file(s) modified)</div><div>Updating configure.sh: <br />
1) we don't patch ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/utils/setup/configure.sh<br />
rfajardo
Tue, 22 Nov 2011 10:54:44 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=142
-
Merging with rc-1.0 revision 140. I doubt rc-1.0 will still ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=141
<div><strong>Rev 141 - rfajardo</strong> (32 file(s) modified)</div><div>Merging with rc-1.0 revision 140. I doubt rc-1.0 will still ...</div>~ /minsoc/trunk<br />~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/altera_3c25_board/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/std/configure<br />~ /minsoc/trunk/backend/std/minsoc_bench_defines.v<br />/minsoc/trunk/bench/verilog/minsoc_bench.v<br />~ /minsoc/trunk/prj/Makefile<br />- /minsoc/trunk/prj/scripts/altprj.sh<br />+ /minsoc/trunk/prj/scripts/altvhdprj.sh<br />+ /minsoc/trunk/prj/scripts/altvprj.sh<br />~ /minsoc/trunk/prj/scripts/simverilog.sh<br />~ /minsoc/trunk/prj/scripts/simvhdl.sh<br />~ /minsoc/trunk/prj/scripts/xilinxprj.sh<br />~ /minsoc/trunk/prj/src/ethmac.prj<br />~ /minsoc/trunk/sim/modelsim/compile_design.bat<br />~ /minsoc/trunk/sim/modelsim/prepare_modelsim.bat<br />~ /minsoc/trunk/sim/modelsim/run_sim.bat<br />~ /minsoc/trunk/sim/modelsim/run_sim.sh<br />~ /minsoc/trunk/sim/run/run_bench<br />~ /minsoc/trunk/sw/utils/bin2hex.c<br />~ /minsoc/trunk/syn/xilinx/setup.bat<br />~ /minsoc/trunk/utils/setup/beautify.sh<br />+ /minsoc/trunk/utils/setup/configure.sh<br />~ /minsoc/trunk/utils/setup/minsoc-install.sh<br />+ /minsoc/trunk/utils/setup/minsoc-setup.sh<br />~ /minsoc/trunk/utils/setup/required-cygwin-tools.txt<br />
rfajardo
Tue, 22 Nov 2011 10:46:40 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=141
-
Updating configure scripts to copy Windows synthesis launch script setup.bat ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=105
<div><strong>Rev 105 - rfajardo</strong> (7 file(s) modified)</div><div>Updating configure scripts to copy Windows synthesis launch script setup.bat ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />- /minsoc/trunk/syn/setup.bat<br />+ /minsoc/trunk/syn/xilinx/setup.bat<br />
rfajardo
Wed, 26 Oct 2011 09:09:30 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=105
-
As proposed by Javier Almansa automatically generated project files for ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=97
<div><strong>Rev 97 - rfajardo</strong> (32 file(s) modified)</div><div>As proposed by Javier Almansa automatically generated project files for ...</div>~ /minsoc/trunk/backend/altera_3c25_board/configure<br />~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />- /minsoc/trunk/prj/altera/adbg_top.prj<br />- /minsoc/trunk/prj/altera/altera_virtual_jtag.prj<br />- /minsoc/trunk/prj/altera/ethmac.prj<br />- /minsoc/trunk/prj/altera/jtag_top.prj<br />- /minsoc/trunk/prj/altera/minsoc_bench.prj<br />- /minsoc/trunk/prj/altera/minsoc_top.prj<br />- /minsoc/trunk/prj/altera/or1200_top.prj<br />- /minsoc/trunk/prj/altera/uart_top.prj<br />- /minsoc/trunk/prj/sim/adbg_top.src<br />- /minsoc/trunk/prj/sim/ethmac.src<br />- /minsoc/trunk/prj/sim/jtag_top.src<br />- /minsoc/trunk/prj/sim/minsoc.src<br />- /minsoc/trunk/prj/sim/minsoc_top.src<br />- /minsoc/trunk/prj/sim/or1200_top.src<br />- /minsoc/trunk/prj/sim/uart_top.src<br />- /minsoc/trunk/prj/xilinx/adbg_top.prj<br />- /minsoc/trunk/prj/xilinx/adbg_top.xst<br />- /minsoc/trunk/prj/xilinx/ethmac.prj<br />- /minsoc/trunk/prj/xilinx/ethmac.xst<br />- /minsoc/trunk/prj/xilinx/jtag_top.prj<br />- /minsoc/trunk/prj/xilinx/jtag_top.xst<br />- /minsoc/trunk/prj/xilinx/minsoc_top.prj<br />- /minsoc/trunk/prj/xilinx/minsoc_top.xst<br />- /minsoc/trunk/prj/xilinx/or1200_top.prj<br />- /minsoc/trunk/prj/xilinx/or1200_top.xst<br />- /minsoc/trunk/prj/xilinx/uart_top.prj<br />- /minsoc/trunk/prj/xilinx/uart_top.xst<br />
rfajardo
Mon, 12 Sep 2011 08:54:47 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=97
-
backend/spartan3e_starter_kit*: or1200_defines.v file was outdated and hindering synthesis. ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=92
<div><strong>Rev 92 - rfajardo</strong> (2 file(s) modified)</div><div>backend/spartan3e_starter_kit*: or1200_defines.v file was outdated and hindering synthesis. Probably it ...</div>~ /minsoc/trunk/backend/spartan3e_starter_kit/or1200_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/or1200_defines.v<br />
rfajardo
Wed, 07 Sep 2011 09:37:23 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=92
-
Project structure, Xilinx Makefiles and simulation working.
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=88
<div><strong>Rev 88 - rfajardo</strong> (20 file(s) modified)</div><div>Project structure, Xilinx Makefiles and simulation working.</div>~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_defines.v<br />~ /minsoc/trunk/prj/Makefile<br />~ /minsoc/trunk/prj/scripts/simprj.sh<br />~ /minsoc/trunk/prj/scripts/xilinxprj.sh<br />~ /minsoc/trunk/prj/scripts/xilinxxst.sh<br />~ /minsoc/trunk/prj/sim/minsoc.src<br />~ /minsoc/trunk/prj/sim/minsoc_top.src<br />+ /minsoc/trunk/prj/src/minsoc_bench.prj<br />~ /minsoc/trunk/prj/src/minsoc_top.prj<br />~ /minsoc/trunk/prj/xilinx/adbg_top.xst<br />~ /minsoc/trunk/prj/xilinx/ethmac.xst<br />~ /minsoc/trunk/prj/xilinx/jtag_top.xst<br />~ /minsoc/trunk/prj/xilinx/minsoc_top.prj<br />~ /minsoc/trunk/prj/xilinx/minsoc_top.xst<br />~ /minsoc/trunk/prj/xilinx/or1200_top.xst<br />~ /minsoc/trunk/prj/xilinx/uart_top.xst<br />~ /minsoc/trunk/rtl/verilog/xilinx_dcm.v<br />~ /minsoc/trunk/syn/xilinx/Makefile<br />
rfajardo
Tue, 06 Sep 2011 16:54:44 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=88
-
Synchronizing scripts to behave exactly the same.
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=87
<div><strong>Rev 87 - rfajardo</strong> (3 file(s) modified)</div><div>Synchronizing scripts to behave exactly the same.</div>~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />
rfajardo
Tue, 06 Sep 2011 15:47:46 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=87
-
Updating configure script messages.
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=86
<div><strong>Rev 86 - rfajardo</strong> (3 file(s) modified)</div><div>Updating configure script messages.</div>~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />
rfajardo
Tue, 06 Sep 2011 15:41:45 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=86
-
Central project definition under prj. Synthesis and simulation take their ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=85
<div><strong>Rev 85 - rfajardo</strong> (55 file(s) modified)</div><div>Central project definition under prj. Synthesis and simulation take their ...</div>~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />~ /minsoc/trunk/backend/std/configure<br />+ /minsoc/trunk/prj<br />+ /minsoc/trunk/prj/altera<br />+ /minsoc/trunk/prj/Makefile<br />+ /minsoc/trunk/prj/scripts<br />+ /minsoc/trunk/prj/scripts/simprj.sh<br />+ /minsoc/trunk/prj/scripts/xilinxprj.sh<br />+ /minsoc/trunk/prj/scripts/xilinxxst.sh<br />+ /minsoc/trunk/prj/sim<br />+ /minsoc/trunk/prj/sim/adbg_top.src<br />+ /minsoc/trunk/prj/sim/ethmac.src<br />+ /minsoc/trunk/prj/sim/jtag_top.src<br />+ /minsoc/trunk/prj/sim/minsoc.src<br />+ /minsoc/trunk/prj/sim/minsoc_top.src<br />+ /minsoc/trunk/prj/sim/or1200_top.src<br />+ /minsoc/trunk/prj/sim/uart_top.src<br />+ /minsoc/trunk/prj/src<br />+ /minsoc/trunk/prj/src/adbg_top.prj<br />+ /minsoc/trunk/prj/src/blackboxes<br />+ /minsoc/trunk/prj/src/blackboxes/ethmac.v<br />- /minsoc/trunk/prj/src/blackboxes/eth_top.v<br />+ /minsoc/trunk/prj/src/ethmac.prj<br />+ /minsoc/trunk/prj/src/jtag_top.prj<br />+ /minsoc/trunk/prj/src/minsoc_top.prj<br />+ /minsoc/trunk/prj/src/or1200_top.prj<br />+ /minsoc/trunk/prj/src/uart_top.prj<br />+ /minsoc/trunk/prj/xilinx<br />+ /minsoc/trunk/prj/xilinx/adbg_top.prj<br />+ /minsoc/trunk/prj/xilinx/adbg_top.xst<br />+ /minsoc/trunk/prj/xilinx/ethmac.prj<br />+ /minsoc/trunk/prj/xilinx/ethmac.xst<br />+ /minsoc/trunk/prj/xilinx/jtag_top.prj<br />+ /minsoc/trunk/prj/xilinx/jtag_top.xst<br />+ /minsoc/trunk/prj/xilinx/minsoc_top.prj<br />+ /minsoc/trunk/prj/xilinx/minsoc_top.xst<br />+ /minsoc/trunk/prj/xilinx/or1200_top.prj<br />+ /minsoc/trunk/prj/xilinx/or1200_top.xst<br />+ /minsoc/trunk/prj/xilinx/uart_top.prj<br />+ /minsoc/trunk/prj/xilinx/uart_top.xst<br />- /minsoc/trunk/sim/bin<br />~ /minsoc/trunk/sim/modelsim/compile_design.bat<br />~ /minsoc/trunk/sim/modelsim/compile_design.sh<br />~ /minsoc/trunk/sim/run/generate_bench<br />- /minsoc/trunk/syn/blackboxes<br />- /minsoc/trunk/syn/buildSupport/adbg_top.prj<br />- /minsoc/trunk/syn/buildSupport/eth_top.prj<br />- /minsoc/trunk/syn/buildSupport/minsoc_top.prj<br />- /minsoc/trunk/syn/buildSupport/or1200_top.prj<br />- /minsoc/trunk/syn/buildSupport/uart_top.prj<br />- /minsoc/trunk/syn/src<br />+ /minsoc/trunk/syn/xilinx<br />+ /minsoc/trunk/syn/xilinx/Makefile<br />
rfajardo
Tue, 06 Sep 2011 15:34:18 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=85
-
Establishing a better Makefile system for firmwares.
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=80
<div><strong>Rev 80 - rfajardo</strong> (21 file(s) modified)</div><div>Establishing a better Makefile system for firmwares.</div>~ /minsoc/trunk/backend/spartan3a_dsp_kit/gcc-opt.mk<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/gcc-opt.mk<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/gcc-opt.mk<br />~ /minsoc/trunk/backend/std/gcc-opt.mk<br />~ /minsoc/trunk/sw/drivers/can.c<br />- /minsoc/trunk/sw/drivers/common.mk<br />~ /minsoc/trunk/sw/drivers/eth.c<br />~ /minsoc/trunk/sw/drivers/i2c.c<br />~ /minsoc/trunk/sw/drivers/Makefile<br />~ /minsoc/trunk/sw/drivers/uart.c<br />- /minsoc/trunk/sw/eth/common.mk<br />~ /minsoc/trunk/sw/eth/eth.c<br />~ /minsoc/trunk/sw/eth/Makefile<br />- /minsoc/trunk/sw/support/common.mk<br />~ /minsoc/trunk/sw/support/Makefile<br />~ /minsoc/trunk/sw/support/Makefile.inc<br />~ /minsoc/trunk/sw/support/reset.S<br />~ /minsoc/trunk/sw/support/support.c<br />- /minsoc/trunk/sw/uart/common.mk<br />~ /minsoc/trunk/sw/uart/Makefile<br />~ /minsoc/trunk/sw/uart/uart.c<br />
rfajardo
Fri, 19 Aug 2011 11:05:49 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=80
-
Including a global timescale under minsoc/rtl/verilog to control simulation. It ...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=70
<div><strong>Rev 70 - rfajardo</strong> (10 file(s) modified)</div><div>Including a global timescale under minsoc/rtl/verilog to control simulation. It ...</div>~ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/std/minsoc_bench_defines.v<br />+ /minsoc/trunk/rtl/verilog/timescale.v<br />~ /minsoc/trunk/sim/bin/minsoc_verilog_files.txt<br />+ /minsoc/trunk/sim/modelsim<br />+ /minsoc/trunk/sim/modelsim/compile_design.sh<br />+ /minsoc/trunk/sim/modelsim/prepare_modelsim.sh<br />+ /minsoc/trunk/sim/modelsim/run_sim.sh<br />
rfajardo
Tue, 10 May 2011 10:06:07 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=70
-
backend update:
-minsoc_bench_defines.v
...
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=69
<div><strong>Rev 69 - rfajardo</strong> (21 file(s) modified)</div><div>backend update: <br />
-minsoc_bench_defines.v<br />
...</div>~ /minsoc/trunk/backend/spartan3a_dsp_kit/configure<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit/gcc-opt.mk<br />+ /minsoc/trunk/backend/spartan3a_dsp_kit/minsoc_bench_defines.v<br />~ /minsoc/trunk/backend/spartan3e_starter_kit/configure<br />+ /minsoc/trunk/backend/spartan3e_starter_kit/gcc-opt.mk<br />+ /minsoc/trunk/backend/spartan3e_starter_kit/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/board.h<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/configure<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/gcc-opt.mk<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_bench_defines.v<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/minsoc_defines.v<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/or1200_defines.v<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/orp.ld<br />+ /minsoc/trunk/backend/spartan3e_starter_kit_eth/spartan3e_starter_kit_eth.ucf<br />~ /minsoc/trunk/backend/std/configure<br />+ /minsoc/trunk/backend/std/gcc-opt.mk<br />+ /minsoc/trunk/backend/std/minsoc_bench_defines.v<br />- /minsoc/trunk/bench/verilog/minsoc_bench_defines.v<br />~ /minsoc/trunk/sim/bin/minsoc_verilog_files.txt<br />~ /minsoc/trunk/sw/support/Makefile.inc<br />
rfajardo
Thu, 05 May 2011 18:11:35 +0100
https://opencores.org/websvn//websvn/revision?repname=minsoc&path=%2Fminsoc%2Ftrunk%2Fbackend%2Fspartan3e_starter_kit_eth%2F&rev=69
© copyright 1999-2026
OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.