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            <title>updated doc</title>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 28 - mikel262&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;updated doc&lt;/div&gt;~ /mdct/trunk/DOC/mdct_spec.doc&lt;br /&gt;</description>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 27 - mikel262&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;Inserted multiple stage pipeline for final adders to improve greatly ...&lt;/div&gt;~ /mdct/trunk/source/DBUFCTL.VHD&lt;br /&gt;~ /mdct/trunk/source/DCT1D.vhd&lt;br /&gt;~ /mdct/trunk/source/DCT2D.VHD&lt;br /&gt;~ /mdct/trunk/source/MDCT.VHD&lt;br /&gt;~ /mdct/trunk/source/MDCT_PKG.vhd&lt;br /&gt;</description>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 26 - root&lt;/strong&gt; (7 file(s) modified)&lt;/div&gt;&lt;div&gt;Added old uploaded documents to new repository.&lt;/div&gt;+ /mdct/web_uploads/block_diagram.jpg&lt;br /&gt;+ /mdct/web_uploads/mdct_12bit.zip&lt;br /&gt;- /mdct/web_uploads/oc_checkin.sh&lt;br /&gt;- /mdct/web_uploads/oc_cvs_checkin.sh&lt;br /&gt;- /mdct/web_uploads/svn_checkin.log&lt;br /&gt;- /mdct/web_uploads/svn_checkin.sh&lt;br /&gt;- /mdct/web_uploads/temp.sh&lt;br /&gt;</description>
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            <title>Added old uploaded documents to new repository.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=25</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 25 - root&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;Added old uploaded documents to new repository.&lt;/div&gt;+ /mdct/web_uploads/oc_checkin.sh&lt;br /&gt;+ /mdct/web_uploads/oc_cvs_checkin.sh&lt;br /&gt;+ /mdct/web_uploads/svn_checkin.log&lt;br /&gt;+ /mdct/web_uploads/svn_checkin.sh&lt;br /&gt;+ /mdct/web_uploads/temp.sh&lt;br /&gt;</description>
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            <pubDate>Tue, 10 Mar 2009 01:08:23 +0100</pubDate>
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            <title>New directory structure.</title>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 24 - root&lt;/strong&gt; (8 file(s) modified)&lt;/div&gt;&lt;div&gt;New directory structure.&lt;/div&gt;- /branches&lt;br /&gt;+ /mdct&lt;br /&gt;+ /mdct/branches&lt;br /&gt;+ /mdct/tags&lt;br /&gt;+ /mdct/trunk&lt;br /&gt;+ /mdct/web_uploads&lt;br /&gt;- /tags&lt;br /&gt;- /trunk&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Tue, 10 Mar 2009 01:07:27 +0100</pubDate>
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            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=23</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 23 - &lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_8'.&lt;/div&gt;+ /tags/MDCT_REL_B1_8&lt;br /&gt;</description>
            <pubDate>Sat, 07 Mar 2009 19:27:48 +0100</pubDate>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 22 - mikel262&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;project released under LGPL&lt;/div&gt;+ /trunk/license.txt&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Sat, 07 Mar 2009 19:27:47 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=22</guid>
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        <item>
            <title>Fix for XST synthesis error and improve readibility (by Andreas ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=21</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 21 - mikel262&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Fix for XST synthesis error and improve readibility (by Andreas ...&lt;/div&gt;~ /trunk/source/ROME.VHD&lt;br /&gt;~ /trunk/source/ROMO.VHD&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Sat, 07 Mar 2009 18:29:27 +0100</pubDate>
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            <title>Fix for XST synthesis error and improve readibility (by Andreas ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=20</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 20 - mikel262&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Fix for XST synthesis error and improve readibility (by Andreas ...&lt;/div&gt;~ /trunk/source/MDCT_PKG.vhd&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Sat, 07 Mar 2009 18:28:34 +0100</pubDate>
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            <title>This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_6'.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=19</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 19 - &lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_6'.&lt;/div&gt;+ /tags/MDCT_REL_B1_6&lt;br /&gt;- /tags/MDCT_REL_B1_6/synthesis&lt;br /&gt;</description>
            <pubDate>Wed, 17 May 2006 22:21:39 +0100</pubDate>
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        <item>
            <title>Minor fixes. This release is FPGA proven.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=18</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 18 - mikel262&lt;/strong&gt; (20 file(s) modified)&lt;/div&gt;&lt;div&gt;Minor fixes. This release is FPGA proven.&lt;/div&gt;~ /trunk/DOC/mdct_spec.doc&lt;br /&gt;~ /trunk/MATLAB/dct_func.m&lt;br /&gt;~ /trunk/mdct.mpf&lt;br /&gt;~ /trunk/source/DBUFCTL.VHD&lt;br /&gt;~ /trunk/source/DCT1D.vhd&lt;br /&gt;~ /trunk/source/DCT2D.VHD&lt;br /&gt;~ /trunk/source/MDCT.VHD&lt;br /&gt;~ /trunk/source/MDCT_PKG.vhd&lt;br /&gt;~ /trunk/source/testbench/CLKGEN.VHD&lt;br /&gt;~ /trunk/source/testbench/COMPILE_TIMING.DO&lt;br /&gt;~ /trunk/source/testbench/INPIMAGE.VHD&lt;br /&gt;~ /trunk/source/testbench/MDCTTB_PKG.vhd&lt;br /&gt;~ /trunk/source/testbench/MDCT_TB.DO&lt;br /&gt;~ /trunk/source/testbench/MDCT_TB.VHD&lt;br /&gt;~ /trunk/source/testbench/RUNSIM_TIMING.DO&lt;br /&gt;~ /trunk/source/xilinx/ram_xil.edn&lt;br /&gt;~ /trunk/source/xilinx/rome_xil.edn&lt;br /&gt;~ /trunk/source/xilinx/rome_xil.vhd&lt;br /&gt;~ /trunk/source/xilinx/romo_xil.edn&lt;br /&gt;~ /trunk/source/xilinx/romo_xil.vhd&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Wed, 17 May 2006 22:21:38 +0100</pubDate>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 17 - &lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_5'.&lt;/div&gt;+ /tags/MDCT_REL_B1_5&lt;br /&gt;</description>
            <pubDate>Wed, 26 Apr 2006 01:59:50 +0100</pubDate>
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            <title>Documentation update, minor fixes</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=16</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 16 - mikel262&lt;/strong&gt; (8 file(s) modified)&lt;/div&gt;&lt;div&gt;Documentation update, minor fixes&lt;/div&gt;~ /trunk/DOC/mdct_spec.doc&lt;br /&gt;+ /trunk/DOC/mdct_spec.pdf&lt;br /&gt;~ /trunk/mdct.mpf&lt;br /&gt;~ /trunk/source/MDCT.VHD&lt;br /&gt;~ /trunk/source/testbench/INPIMAGE.VHD&lt;br /&gt;~ /trunk/source/testbench/MDCTTB_PKG.vhd&lt;br /&gt;~ /trunk/source/testbench/MDCT_TB.VHD&lt;br /&gt;~ /trunk/source/testbench/wave.do&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Wed, 26 Apr 2006 01:59:49 +0100</pubDate>
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            <title>Redesigned. Fully pipelined, always ready for data design</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=15</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 15 - mikel262&lt;/strong&gt; (15 file(s) modified)&lt;/div&gt;&lt;div&gt;Redesigned. Fully pipelined, always ready for data design&lt;/div&gt;~ /trunk/mdct.mpf&lt;br /&gt;~ /trunk/source/DBUFCTL.VHD&lt;br /&gt;~ /trunk/source/DCT1D.vhd&lt;br /&gt;~ /trunk/source/DCT2D.VHD&lt;br /&gt;~ /trunk/source/MDCT.VHD&lt;br /&gt;~ /trunk/source/testbench/COMPILE_TIMING.DO&lt;br /&gt;~ /trunk/source/testbench/INPIMAGE.VHD&lt;br /&gt;~ /trunk/source/testbench/MDCTTB_PKG.vhd&lt;br /&gt;~ /trunk/source/testbench/MDCT_TB.DO&lt;br /&gt;~ /trunk/source/testbench/MDCT_TB.VHD&lt;br /&gt;+ /trunk/source/testbench/random1.vhd&lt;br /&gt;~ /trunk/source/testbench/wave.do&lt;br /&gt;+ /trunk/source/xilinx/RAM.VHD&lt;br /&gt;+ /trunk/source/xilinx/ram_xil.edn&lt;br /&gt;+ /trunk/source/xilinx/ram_xil.vhd&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Wed, 26 Apr 2006 00:42:05 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=15</guid>
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        <item>
            <title>This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_4'.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=14</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 14 - &lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_4'.&lt;/div&gt;+ /tags/MDCT_REL_B1_4&lt;br /&gt;</description>
            <pubDate>Sat, 22 Apr 2006 01:41:26 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=14</guid>
        </item>
        <item>
            <title>performance improved by 8%, latency reduced to 94 cycles</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=13</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 13 - mikel262&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;performance improved by 8%, latency reduced to 94 cycles&lt;/div&gt;~ /trunk/mdct.mpf&lt;br /&gt;~ /trunk/source/DCT1D.vhd&lt;br /&gt;~ /trunk/source/DCT2D.VHD&lt;br /&gt;~ /trunk/source/testbench/INPIMAGE.VHD&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Sat, 22 Apr 2006 01:41:25 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=13</guid>
        </item>
        <item>
            <title>This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_3'.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=12</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 12 - &lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_3'.&lt;/div&gt;+ /tags/MDCT_REL_B1_3&lt;br /&gt;</description>
            <pubDate>Fri, 21 Apr 2006 02:02:20 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=12</guid>
        </item>
        <item>
            <title>changed ROM memory model to synchronous</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=11</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 11 - mikel262&lt;/strong&gt; (17 file(s) modified)&lt;/div&gt;&lt;div&gt;changed ROM memory model to synchronous&lt;/div&gt;~ /trunk/DOC/mdct_spec.doc&lt;br /&gt;~ /trunk/mdct.mpf&lt;br /&gt;~ /trunk/source/MDCT.VHD&lt;br /&gt;~ /trunk/source/ROME.VHD&lt;br /&gt;~ /trunk/source/ROMO.VHD&lt;br /&gt;~ /trunk/source/testbench/MDCT_TB.DO&lt;br /&gt;+ /trunk/source/xilinx&lt;br /&gt;+ /trunk/source/xilinx/Rome.coe&lt;br /&gt;+ /trunk/source/xilinx/ROME.VHD&lt;br /&gt;+ /trunk/source/xilinx/rome_xil.edn&lt;br /&gt;+ /trunk/source/xilinx/rome_xil.mif&lt;br /&gt;+ /trunk/source/xilinx/rome_xil.vhd&lt;br /&gt;+ /trunk/source/xilinx/Romo.coe&lt;br /&gt;+ /trunk/source/xilinx/ROMO.VHD&lt;br /&gt;+ /trunk/source/xilinx/romo_xil.edn&lt;br /&gt;+ /trunk/source/xilinx/romo_xil.mif&lt;br /&gt;+ /trunk/source/xilinx/romo_xil.vhd&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Fri, 21 Apr 2006 02:02:19 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=11</guid>
        </item>
        <item>
            <title>+ moved memory allocation request to where it should be
+ ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=10</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 10 - mikel262&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;+ moved memory allocation request to where it should be&lt;br /&gt;
+ ...&lt;/div&gt;~ /trunk/mdct.mpf&lt;br /&gt;~ /trunk/source/DCT1D.vhd&lt;br /&gt;~ /trunk/source/testbench/wave.do&lt;br /&gt;</description>
            <author>mikel262</author>
            <pubDate>Thu, 20 Apr 2006 00:18:00 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=10</guid>
        </item>
        <item>
            <title>This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_2'.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=9</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 9 - &lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;This commit was manufactured by cvs2svn to create tag 'MDCT_REL_B1_2'.&lt;/div&gt;+ /tags/MDCT_REL_B1_2&lt;br /&gt;</description>
            <pubDate>Mon, 17 Apr 2006 13:22:22 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=mdct&amp;path=%2F&amp;rev=9</guid>
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