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            <title>Removed negedge from tlb data ram - 5% performance boost</title>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 8 - dmitryr&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;Removed negedge from tlb data ram - 5% performance boost&lt;/div&gt;~ /sparc64soc/trunk/T1-common/srams/bw_r_scm.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_tlb_fpga.v&lt;br /&gt;~ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu.v&lt;br /&gt;~ /sparc64soc/trunk/T1-CPU/lsu/lsu.v&lt;br /&gt;</description>
            <author>dmitryr</author>
            <pubDate>Fri, 08 Oct 2010 13:34:49 +0100</pubDate>
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            <title>Bugfix</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=7</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 7 - dmitryr&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Bugfix&lt;/div&gt;~ /sparc64soc/trunk/os2wb/l1dir.v&lt;br /&gt;~ /sparc64soc/trunk/os2wb/os2wb_dual.v&lt;br /&gt;</description>
            <author>dmitryr</author>
            <pubDate>Fri, 30 Jul 2010 08:34:14 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=7</guid>
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            <title>Final dual-core design able to boot Linux</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=6</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 6 - dmitryr&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;Final dual-core design able to boot Linux&lt;/div&gt;~ /sparc64soc/trunk/os2wb/l1dir.v&lt;br /&gt;~ /sparc64soc/trunk/os2wb/os2wb_dual.v&lt;br /&gt;~ /sparc64soc/trunk/os2wb/s1_top.v&lt;br /&gt;+ /sparc64soc/trunk/PROM/2c1t_obp_prom.rar&lt;br /&gt;+ /sparc64soc/trunk/PROM/2c4t_obp_prom.rar&lt;br /&gt;</description>
            <author>dmitryr</author>
            <pubDate>Tue, 27 Jul 2010 08:10:02 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=6</guid>
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            <title>New L1 directory for dual CPU (second CPU is not ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=5</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 5 - dmitryr&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;New L1 directory for dual CPU (second CPU is not ...&lt;/div&gt;+ /sparc64soc/trunk/os2wb/l1ddir.v&lt;br /&gt;+ /sparc64soc/trunk/os2wb/l1dir.v&lt;br /&gt;+ /sparc64soc/trunk/os2wb/l1idir.v&lt;br /&gt;+ /sparc64soc/trunk/os2wb/os2wb_dual.v&lt;br /&gt;</description>
            <author>dmitryr</author>
            <pubDate>Wed, 21 Jul 2010 11:27:27 +0100</pubDate>
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            <title>New IRF, much smaller footprint.</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=4</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 4 - dmitryr&lt;/strong&gt; (5 file(s) modified)&lt;/div&gt;&lt;div&gt;New IRF, much smaller footprint.&lt;/div&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_irf_fpga1.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/regfile_1w_4r.v&lt;br /&gt;~ /sparc64soc/trunk/T1-CPU/exu/sparc_exu.v&lt;br /&gt;~ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_rml.v&lt;br /&gt;~ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_rml_cwp.v&lt;br /&gt;</description>
            <author>dmitryr</author>
            <pubDate>Thu, 17 Jun 2010 08:59:32 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=4</guid>
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            <title>Release able to boot Ubuntu Linux 2.6.22 with 4 thread ...</title>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 3 - dmitryr&lt;/strong&gt; (3 file(s) modified)&lt;/div&gt;&lt;div&gt;Release able to boot Ubuntu Linux 2.6.22 with 4 thread ...&lt;/div&gt;~ /sparc64soc/trunk/os2wb/os2wb.v&lt;br /&gt;~ /sparc64soc/trunk/Top/W1.v&lt;br /&gt;~ /sparc64soc/trunk/WB2ALTDDR3/dram_wb.v&lt;br /&gt;</description>
            <author>dmitryr</author>
            <pubDate>Fri, 02 Apr 2010 08:15:53 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=3</guid>
        </item>
        <item>
            <title>Initial release</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=2</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 2 - dmitryr&lt;/strong&gt; (293 file(s) modified)&lt;/div&gt;&lt;div&gt;Initial release&lt;/div&gt;+ /sparc64soc/trunk/Doc&lt;br /&gt;+ /sparc64soc/trunk/NOR-flash&lt;br /&gt;+ /sparc64soc/trunk/NOR-flash/WBFLASH.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_clockgen.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_cop.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_crc.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_defines.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_fifo.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_maccontrol.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_macstatus.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_miim.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_outputcontrol.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_random.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_receivecontrol.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_register.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_registers.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_rxaddrcheck.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_rxcounters.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_rxethmac.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_rxstatem.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_sgmii.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_shiftreg.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_spram_256x32.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_top.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_transmitcontrol.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_txcounters.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_txethmac.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_txstatem.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/eth_wishbone.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/timescale.v&lt;br /&gt;+ /sparc64soc/trunk/OC-Ethernet/xilinx_dist_ram_16x32.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/raminfr.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/timescale.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_debug_if.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_defines.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_receiver.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_regs.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_rfifo.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_sync_flops.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_tfifo.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_top.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_transmitter.v&lt;br /&gt;+ /sparc64soc/trunk/OC-UART/uart_wb.v&lt;br /&gt;+ /sparc64soc/trunk/os2wb&lt;br /&gt;+ /sparc64soc/trunk/os2wb/os2wb.v&lt;br /&gt;+ /sparc64soc/trunk/os2wb/rst_ctrl.v&lt;br /&gt;+ /sparc64soc/trunk/os2wb/s1_top.v&lt;br /&gt;+ /sparc64soc/trunk/PROM&lt;br /&gt;+ /sparc64soc/trunk/PROM/1c1t_obp_prom.rar&lt;br /&gt;+ /sparc64soc/trunk/PROM/1c4t_obp_prom.rar&lt;br /&gt;+ /sparc64soc/trunk/PROM/OS Readme.txt&lt;br /&gt;+ /sparc64soc/trunk/T1-common&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/cluster_header.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/cluster_header_ctu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/cluster_header_dup.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/cluster_header_sync.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/cmp_sram_redhdr.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/dbl_buf.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/swrvr_clib.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/swrvr_dlib.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/synchronizer_asr.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/synchronizer_asr_dup.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/sync_pulse_synchronizer.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/test_stub_bist.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/test_stub_scan.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/ucb_bus_in.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/ucb_bus_out.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/ucb_flow_2buf.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/ucb_flow_jbi.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/ucb_flow_spi.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/common/ucb_noflow.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include/ifu.h&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include/iop.h&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include/lsu.h&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include/sys.h&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include/sys_paths.h&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include/tlu.h&lt;br /&gt;+ /sparc64soc/trunk/T1-common/include/xst_defines.h&lt;br /&gt;+ /sparc64soc/trunk/T1-common/m1&lt;br /&gt;+ /sparc64soc/trunk/T1-common/m1/m1.V&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams&lt;br /&gt;+ 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/sparc64soc/trunk/T1-common/srams/bw_r_l2t.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_rf16x32.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_rf16x128d.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_rf16x160.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_rf32x80.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_rf32x108.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_rf32x152b.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_scm.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/bw_r_tlb.v&lt;br /&gt;+ /sparc64soc/trunk/T1-common/srams/Flist.srams&lt;br /&gt;+ /sparc64soc/trunk/T1-common/u1&lt;br /&gt;+ /sparc64soc/trunk/T1-common/u1/u1.V&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_alu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_aluadder64.v&lt;br /&gt;+ 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/sparc64soc/trunk/T1-CPU/exu/sparc_exu_eclccr.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_eclcomp7.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_ecl_cnt6.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_ecl_divcntl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_ecl_eccctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_ecl_mdqctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_ecl_wb.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_reg.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_rml.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_rml_cwp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_rml_inc3.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_rndrob.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/exu/sparc_exu_shft.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ffu&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ffu/sparc_ffu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ffu/sparc_ffu_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ffu/sparc_ffu_ctl_visctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ffu/sparc_ffu_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ffu/sparc_ffu_part_add32.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ffu/sparc_ffu_vis.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_cmp35.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_ctr5.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_dcl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_dec.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_errctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_errdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_fcl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_fdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_ifqctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_ifqdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_imd.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_incr46.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_invctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_lfsr5.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_lru4.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_mbist.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_milfsm.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_par16.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_par32.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_par34.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_rndrob.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_sscan.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_swl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_swpla.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_thrcmpl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_thrfsm.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/ifu/sparc_ifu_wseldp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_asi_decode.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_dcache_lfsr.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_dcdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_dctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_dctldp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_dc_parity_gen.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_excpctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_pcx_qmon.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_qctl1.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_qctl2.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_qdp1.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_qdp2.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_rrobin_picker2.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_stb_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_stb_ctldp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_stb_rwctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_stb_rwdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_tagdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/lsu/lsu_tlbdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/mul&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/mul/mul64.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/mul/sparc_mul_cntl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/mul/sparc_mul_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/mul/sparc_mul_top.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/rtl&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/rtl/bw_clk_cl_sparc_cmp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/rtl/cpx_spc_buf.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/rtl/cpx_spc_rpt.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/rtl/sparc.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/rtl/spc_pcx_buf.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_lsurpt.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_lsurpt1.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_maaddr.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_maaeqb.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_mactl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_madp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_maexp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_mald.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_mamul.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_mared.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_mast.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/spu/spu_wen.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/sparc_tlu_dec64.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/sparc_tlu_intctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/sparc_tlu_intdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/sparc_tlu_penc64.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/sparc_tlu_zcmp64.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_addern_32.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_hyperv.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_incr64.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_misctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_mmu_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_mmu_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_pib.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_prencoder16.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_rrobin_picker.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_tcl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-CPU/tlu/tlu_tdp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/bw_clk_cl_fpu_cmp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_add.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_add_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_add_exp_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_add_frac_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_cnt_lead0_53b.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_cnt_lead0_64b.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_cnt_lead0_lvl1.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_cnt_lead0_lvl2.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_cnt_lead0_lvl3.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_cnt_lead0_lvl4.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_denorm_3b.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_denorm_3to1.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_denorm_frac.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_div.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_div_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_div_exp_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_div_frac_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_in.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_in2_gt_in1_2b.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_in2_gt_in1_3b.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_in2_gt_in1_3to1.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_in2_gt_in1_frac.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_in_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_in_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_mul.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_mul_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_mul_exp_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_mul_frac_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_out.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_out_ctl.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_out_dp.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_rptr_groups.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_rptr_macros.v&lt;br /&gt;+ /sparc64soc/trunk/T1-FPU/fpu_rptr_min_global.v&lt;br /&gt;+ /sparc64soc/trunk/Top&lt;br /&gt;+ /sparc64soc/trunk/Top/W1.v&lt;br /&gt;+ /sparc64soc/trunk/WB&lt;br /&gt;+ /sparc64soc/trunk/WB/wb_conbus_arb.v&lt;br /&gt;+ /sparc64soc/trunk/WB/wb_conbus_defines.v&lt;br /&gt;+ /sparc64soc/trunk/WB/wb_conbus_top.v&lt;br /&gt;+ /sparc64soc/trunk/WB2ALTDDR3&lt;br /&gt;+ /sparc64soc/trunk/WB2ALTDDR3/dram_wb.v&lt;br /&gt;</description>
            <author>dmitryr</author>
            <pubDate>Tue, 30 Mar 2010 13:02:18 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=2</guid>
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            <title>The project and the structure was created</title>
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            <description>&lt;div&gt;&lt;strong&gt;Rev 1 - root&lt;/strong&gt; (4 file(s) modified)&lt;/div&gt;&lt;div&gt;The project and the structure was created&lt;/div&gt;+ /sparc64soc&lt;br /&gt;+ /sparc64soc/branches&lt;br /&gt;+ /sparc64soc/tags&lt;br /&gt;+ /sparc64soc/trunk&lt;br /&gt;</description>
            <author>root</author>
            <pubDate>Tue, 30 Mar 2010 07:00:05 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=sparc64soc&amp;path=%2F&amp;rev=1</guid>
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