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open8_urisc WebSVN RSS feed - open8_urisc https://opencores.org/websvn//websvn/listing?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2Fo8_cpu.vhd& Thu, 14 May 2026 06:13:22 +0100 FeedCreator 1.7.2 Updated comments https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=264 <div><strong>Rev 264 - jshamlet</strong> (1 file(s) modified)</div><div>Updated comments</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Fri, 10 Jul 2020 23:13:52 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=264 Fixed a very old bug in the CPU core where ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=263 <div><strong>Rev 263 - jshamlet</strong> (2 file(s) modified)</div><div>Fixed a very old bug in the CPU core where ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd<br /> jshamlet Fri, 10 Jul 2020 23:00:32 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=263 Added missing comments for Sequential_Interrupts generic, as well as comments ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=260 <div><strong>Rev 260 - jshamlet</strong> (1 file(s) modified)</div><div>Added missing comments for Sequential_Interrupts generic, as well as comments ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Thu, 11 Jun 2020 20:27:20 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=260 Removed unused generic from the status_led.vhd and cleaned up comments ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=256 <div><strong>Rev 256 - jshamlet</strong> (2 file(s) modified)</div><div>Removed unused generic from the status_led.vhd and cleaned up comments ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/status_led.vhd<br /> jshamlet Wed, 10 Jun 2020 19:29:37 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=256 Modified code to make ModelSim happy (It didn't like the ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=255 <div><strong>Rev 255 - jshamlet</strong> (1 file(s) modified)</div><div>Modified code to make ModelSim happy (It didn't like the ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Wed, 10 Jun 2020 15:01:48 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=255 Simplified the ISR address logic so that the upper 12 ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=254 <div><strong>Rev 254 - jshamlet</strong> (1 file(s) modified)</div><div>Simplified the ISR address logic so that the upper 12 ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Wed, 10 Jun 2020 00:21:03 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=254 Fixed spelling error in comment https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=253 <div><strong>Rev 253 - jshamlet</strong> (1 file(s) modified)</div><div>Fixed spelling error in comment</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Tue, 09 Jun 2020 23:58:30 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=253 (This time the CPU model was included...) Added the ability to ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=252 <div><strong>Rev 252 - jshamlet</strong> (1 file(s) modified)</div><div>(This time the CPU model was included...)<br /> Added the ability to ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Tue, 09 Jun 2020 23:39:06 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=252 Removed Default_Int_Flag generic from CPU, as it is duplicated by ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=248 <div><strong>Rev 248 - jshamlet</strong> (1 file(s) modified)</div><div>Removed Default_Int_Flag generic from CPU, as it is duplicated by ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Sun, 24 May 2020 16:01:29 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=248 Modified the CPU's Supervisor_Mode to also protect SMSK and RSP ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=245 <div><strong>Rev 245 - jshamlet</strong> (2 file(s) modified)</div><div>Modified the CPU's Supervisor_Mode to also protect SMSK and RSP ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />+ /open8_urisc/trunk/VHDL/o8_int_mgr.vhd<br /> jshamlet Thu, 21 May 2020 18:31:22 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=245 Added two new generics to the CPU model. The first ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=244 <div><strong>Rev 244 - jshamlet</strong> (33 file(s) modified)</div><div>Added two new generics to the CPU model. The first ...</div>~ /open8_urisc/trunk/VHDL/o8_7seg.vhd<br />~ /open8_urisc/trunk/VHDL/o8_alu16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_async_serial.vhd<br />~ /open8_urisc/trunk/VHDL/o8_btn_int.vhd<br />~ /open8_urisc/trunk/VHDL/o8_clk_detect.vhd<br />~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd<br />~ /open8_urisc/trunk/VHDL/o8_datalatch.vhd<br />~ /open8_urisc/trunk/VHDL/o8_elapsed_usec.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer_ii.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpin.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpio.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpout.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_lfsr32.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd<br />~ /open8_urisc/trunk/VHDL/o8_max7221.vhd<br />~ /open8_urisc/trunk/VHDL/o8_pwm16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_pwm_adc.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_1k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_4k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_register.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd<br />~ /open8_urisc/trunk/VHDL/o8_status_led.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sys_timer_ii.vhd<br />+ /open8_urisc/trunk/VHDL/o8_trig_delay.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vector_rx.vhd<br /> jshamlet Wed, 20 May 2020 22:10:07 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=244 Added a demonstration Open8_cfg.vhd file, which is used to configure ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=227 <div><strong>Rev 227 - jshamlet</strong> (3 file(s) modified)</div><div>Added a demonstration Open8_cfg.vhd file, which is used to configure ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />+ /open8_urisc/trunk/VHDL/Open8_cfg.vhd<br />~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd<br /> jshamlet Thu, 16 Apr 2020 20:51:37 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=227 Added Halt_Ack to go with Halt_Req. https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=225 <div><strong>Rev 225 - jshamlet</strong> (1 file(s) modified)</div><div>Added Halt_Ack to go with Halt_Req.</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br /> jshamlet Thu, 16 Apr 2020 17:18:13 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=225 Finished new Open8 bus record, which now includes the clock, ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=224 <div><strong>Rev 224 - jshamlet</strong> (29 file(s) modified)</div><div>Finished new Open8 bus record, which now includes the clock, ...</div>~ /open8_urisc/trunk/VHDL/o8_alu16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_async_serial.vhd<br />~ /open8_urisc/trunk/VHDL/o8_btn_int.vhd<br />~ /open8_urisc/trunk/VHDL/o8_clk_detect.vhd<br />~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd<br />~ /open8_urisc/trunk/VHDL/o8_datalatch.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer_ii.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpin.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpio.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpout.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_lfsr32.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd<br />~ /open8_urisc/trunk/VHDL/o8_max7221.vhd<br />~ /open8_urisc/trunk/VHDL/o8_pwm16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_1k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_4k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_register.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rom_32k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd<br />~ /open8_urisc/trunk/VHDL/o8_status_led.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd<br />~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd<br /> jshamlet Thu, 16 Apr 2020 15:20:57 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=224 Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=223 <div><strong>Rev 223 - jshamlet</strong> (29 file(s) modified)</div><div>Added an OPEN8_BUS_TYPE record to simplify connection to Open8 modules. ...</div>~ /open8_urisc/trunk/VHDL/o8_alu16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_async_serial.vhd<br />~ /open8_urisc/trunk/VHDL/o8_btn_int.vhd<br />~ /open8_urisc/trunk/VHDL/o8_clk_detect.vhd<br />~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd<br />~ /open8_urisc/trunk/VHDL/o8_datalatch.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer_ii.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpin.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpio.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpout.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_lfsr32.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd<br />~ /open8_urisc/trunk/VHDL/o8_max7221.vhd<br />~ /open8_urisc/trunk/VHDL/o8_pwm16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_1k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_4k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_register.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rom_32k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sdlc_if.vhd<br />~ /open8_urisc/trunk/VHDL/o8_status_led.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd<br />~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd<br /> jshamlet Wed, 15 Apr 2020 22:12:24 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=223 Modified the timers to reset on new interval write. This ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=210 <div><strong>Rev 210 - jshamlet</strong> (4 file(s) modified)</div><div>Modified the timers to reset on new interval write. This ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd<br />~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd<br /> jshamlet Thu, 09 Apr 2020 14:27:42 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=210 Fixed an issue in the PIT timer that caused an ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=209 <div><strong>Rev 209 - jshamlet</strong> (8 file(s) modified)</div><div>Fixed an issue in the PIT timer that caused an ...</div>~ /open8_urisc/trunk/VHDL/async_ser_rx.vhd<br />~ /open8_urisc/trunk/VHDL/async_ser_tx.vhd<br />~ /open8_urisc/trunk/VHDL/o8_async_serial.vhd<br />~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd<br />+ /open8_urisc/trunk/VHDL/o8_ram_4k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br />+ /open8_urisc/trunk/VHDL/ram_4k_core.vhd<br /> jshamlet Thu, 09 Apr 2020 01:40:42 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=209 Cleaned up licensing sections https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=194 <div><strong>Rev 194 - jshamlet</strong> (22 file(s) modified)</div><div>Cleaned up licensing sections</div>~ /open8_urisc/trunk/VHDL/o8_alu16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_clk_detect.vhd<br />~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd<br />~ /open8_urisc/trunk/VHDL/o8_datalatch.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpin.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpio.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpout.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd<br />~ /open8_urisc/trunk/VHDL/o8_max7221.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_1k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_register.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rom_32k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br />~ /open8_urisc/trunk/VHDL/o8_status_led.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd<br />~ /open8_urisc/trunk/VHDL/sdlc_serial_pkg.vhd<br /> jshamlet Tue, 31 Mar 2020 19:43:32 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=194 Cleaned up comments, added back the OPEN8_NULLBUS constant, and added ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=191 <div><strong>Rev 191 - jshamlet</strong> (28 file(s) modified)</div><div>Cleaned up comments, added back the OPEN8_NULLBUS constant, and added ...</div>+ /open8_urisc/trunk/VHDL/button_db.vhd<br />~ /open8_urisc/trunk/VHDL/o8_alu16.vhd<br />~ /open8_urisc/trunk/VHDL/o8_btn_int.vhd<br />~ /open8_urisc/trunk/VHDL/o8_clk_detect.vhd<br />~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd<br />~ /open8_urisc/trunk/VHDL/o8_datalatch.vhd<br />~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpin.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpio.vhd<br />~ /open8_urisc/trunk/VHDL/o8_gpout.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd<br />~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd<br />+ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd<br />+ /open8_urisc/trunk/VHDL/o8_max7221.vhd<br />+ /open8_urisc/trunk/VHDL/o8_max7221_fifo.vhd<br />~ /open8_urisc/trunk/VHDL/o8_ram_1k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_register.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rom_32k.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br />~ /open8_urisc/trunk/VHDL/o8_status_led.vhd<br />~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd<br />~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd<br />~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd<br />+ /open8_urisc/trunk/VHDL/ram_1k_core.vhd<br />+ /open8_urisc/trunk/VHDL/rom_32k_core.vhd<br />+ /open8_urisc/trunk/VHDL/sdlc_crc16_ccitt.vhd<br /> jshamlet Tue, 31 Mar 2020 18:53:53 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=191 Fixed a bug in CPU where RTI/RTS wasn't idling the ... https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=190 <div><strong>Rev 190 - jshamlet</strong> (2 file(s) modified)</div><div>Fixed a bug in CPU where RTI/RTS wasn't idling the ...</div>~ /open8_urisc/trunk/VHDL/o8_cpu.vhd<br />~ /open8_urisc/trunk/VHDL/o8_rtc.vhd<br /> jshamlet Thu, 19 Mar 2020 21:21:41 +0100 https://opencores.org/websvn//websvn/revision?repname=open8_urisc&path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&rev=190
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