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        <link>https://opencores.org/websvn//websvn/listing?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2Fo8_rtc.vhd&amp;</link>
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        <item>
            <title>Cleaned up licensing sections</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=194</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 194 - jshamlet&lt;/strong&gt; (22 file(s) modified)&lt;/div&gt;&lt;div&gt;Cleaned up licensing sections&lt;/div&gt;~ /open8_urisc/trunk/VHDL/o8_alu16.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_clk_detect.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_cpu.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_datalatch.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpin.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpio.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpout.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_max7221.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_ram_1k.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_register.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_rom_32k.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_status_led.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/sdlc_serial_pkg.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Tue, 31 Mar 2020 19:43:32 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=194</guid>
        </item>
        <item>
            <title>Cleaned up comments, added back the OPEN8_NULLBUS constant, and added ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=191</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 191 - jshamlet&lt;/strong&gt; (28 file(s) modified)&lt;/div&gt;&lt;div&gt;Cleaned up comments, added back the OPEN8_NULLBUS constant, and added ...&lt;/div&gt;+ /open8_urisc/trunk/VHDL/button_db.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_alu16.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_btn_int.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_clk_detect.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_cpu.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_crc16_ccitt.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_datalatch.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpin.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpio.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpout.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_ltc2355_2p.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_max7221.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_max7221_fifo.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_ram_1k.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_register.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_rom_32k.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_status_led.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/ram_1k_core.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/rom_32k_core.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/sdlc_crc16_ccitt.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Tue, 31 Mar 2020 18:53:53 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=191</guid>
        </item>
        <item>
            <title>Fixed a bug in CPU where RTI/RTS wasn't idling the ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=190</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 190 - jshamlet&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Fixed a bug in CPU where RTI/RTS wasn't idling the ...&lt;/div&gt;~ /open8_urisc/trunk/VHDL/o8_cpu.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Thu, 19 Mar 2020 21:21:41 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=190</guid>
        </item>
        <item>
            <title>Merged changes from private repository,
added ceil_log2 function to Open8_pkg, since ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=189</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 189 - jshamlet&lt;/strong&gt; (11 file(s) modified)&lt;/div&gt;&lt;div&gt;Merged changes from private repository,&lt;br /&gt;
added ceil_log2 function to Open8_pkg, since ...&lt;/div&gt;~ /open8_urisc/trunk/VHDL/o8_btn_int.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_epoch_timer.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpin.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_hd44780_4b.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_hd44780_8b.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_status_led.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_sys_timer.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_vdsm12.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Wed, 18 Mar 2020 20:47:28 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=189</guid>
        </item>
        <item>
            <title>Fixed comments in RTC module</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=177</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 177 - jshamlet&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Fixed comments in RTC module&lt;/div&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Mon, 25 Jul 2016 18:23:15 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=177</guid>
        </item>
        <item>
            <title>Fixed documentation errors,
Modified uSec_Tick such that it is always generated ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=176</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 176 - jshamlet&lt;/strong&gt; (1 file(s) modified)&lt;/div&gt;&lt;div&gt;Fixed documentation errors,&lt;br /&gt;
Modified uSec_Tick such that it is always generated ...&lt;/div&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Wed, 20 Jul 2016 20:52:24 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=176</guid>
        </item>
        <item>
            <title>General code cleanup</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=172</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 172 - jshamlet&lt;/strong&gt; (7 file(s) modified)&lt;/div&gt;&lt;div&gt;General code cleanup&lt;/div&gt;~ /open8_urisc/trunk/VHDL/o8_alu16.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_etc.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_gpout.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/Open8.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/Open8_pkg.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Thu, 07 Jan 2016 20:59:18 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=172</guid>
        </item>
        <item>
            <title>Simplified write data path logic,
Converted RTC to packed BCD,
Corrected several ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=168</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 168 - jshamlet&lt;/strong&gt; (2 file(s) modified)&lt;/div&gt;&lt;div&gt;Simplified write data path logic,&lt;br /&gt;
Converted RTC to packed BCD,&lt;br /&gt;
Corrected several ...&lt;/div&gt;~ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/Open8.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Thu, 26 Sep 2013 00:00:17 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=168</guid>
        </item>
        <item>
            <title>Updated CPU model; Pipelined ALU control signals to improve fMAX, ...</title>
            <link>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=167</link>
            <description>&lt;div&gt;&lt;strong&gt;Rev 167 - jshamlet&lt;/strong&gt; (8 file(s) modified)&lt;/div&gt;&lt;div&gt;Updated CPU model; Pipelined ALU control signals to improve fMAX, ...&lt;/div&gt;+ /open8_urisc/trunk/VHDL/o8_alu16.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_gpin.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_gpio.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_gpout.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_pit.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_rtc.vhd&lt;br /&gt;+ /open8_urisc/trunk/VHDL/o8_vdsm8.vhd&lt;br /&gt;~ /open8_urisc/trunk/VHDL/Open8.vhd&lt;br /&gt;</description>
            <author>jshamlet</author>
            <pubDate>Wed, 18 Sep 2013 01:42:00 +0100</pubDate>
            <guid>https://opencores.org/websvn//websvn/revision?repname=open8_urisc&amp;path=%2Fopen8_urisc%2Ftrunk%2FVHDL%2F&amp;rev=167</guid>
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