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URL https://opencores.org/ocsvn/cop/cop/trunk

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cop WebSVN RSS feed - cop https://opencores.org/websvn//websvn/listing?repname=cop&path=%2Fcop%2Ftrunk%2F& Thu, 28 Mar 2024 19:10:01 +0100 FeedCreator 1.7.2 Change WISHBONE ack signal so no output is generated when ... https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=12 <div><strong>Rev 12 - rehayes</strong> (1 file(s) modified)</div><div>Change WISHBONE ack signal so no output is generated when ...</div>~ /cop/trunk/rtl/verilog/cop_wb_bus.v<br /> rehayes Wed, 27 Jan 2010 20:28:09 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=12 Minor cosmetic changes. https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=11 <div><strong>Rev 11 - rehayes</strong> (1 file(s) modified)</div><div>Minor cosmetic changes.</div>~ /cop/trunk/doc/src/COP_specs.doc<br /> rehayes Wed, 27 Jan 2010 20:24:22 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=11 Fix blocking assigment https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=10 <div><strong>Rev 10 - rehayes</strong> (1 file(s) modified)</div><div>Fix blocking assigment</div>~ /cop/trunk/bench/verilog/tst_bench_top.v<br /> rehayes Thu, 10 Sep 2009 16:45:56 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=10 Removed unused pin cnt_flag_o from cop_regs.v https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=9 <div><strong>Rev 9 - rehayes</strong> (2 file(s) modified)</div><div>Removed unused pin cnt_flag_o from cop_regs.v</div>~ /cop/trunk/rtl/verilog/cop_regs.v<br />~ /cop/trunk/rtl/verilog/cop_top.v<br /> rehayes Fri, 03 Jul 2009 18:59:23 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=9 Cosmetic update, changed no-blocking assigment to blocking assigment https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=8 <div><strong>Rev 8 - rehayes</strong> (1 file(s) modified)</div><div>Cosmetic update, changed no-blocking assigment to blocking assigment</div>~ /cop/trunk/rtl/verilog/cop_wb_bus.v<br /> rehayes Fri, 03 Jul 2009 18:57:15 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=8 Added interrupt test https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=7 <div><strong>Rev 7 - rehayes</strong> (1 file(s) modified)</div><div>Added interrupt test</div>~ /cop/trunk/bench/verilog/tst_bench_top.v<br /> rehayes Fri, 19 Jun 2009 18:45:54 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=7 Deleted waveform save file https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=6 <div><strong>Rev 6 - rehayes</strong> (1 file(s) modified)</div><div>Deleted waveform save file</div>- /cop/trunk/sim/verilog/run/.cop_wave.sav<br /> rehayes Tue, 16 Jun 2009 20:32:36 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=6 Initial Release June 16, 2009 - Bob Hayes https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=5 <div><strong>Rev 5 - rehayes</strong> (6 file(s) modified)</div><div>Initial Release June 16, 2009 - Bob Hayes</div>+ /cop/trunk/sim<br />+ /cop/trunk/sim/verilog<br />+ /cop/trunk/sim/verilog/run<br />+ /cop/trunk/sim/verilog/run/.cop_wave.sav<br />+ /cop/trunk/sim/verilog/run/how_to<br />+ /cop/trunk/sim/verilog/run/run_iverilog<br /> rehayes Tue, 16 Jun 2009 20:15:19 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=5 Initial Release June 16, 2009 - Bob Hayes https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=4 <div><strong>Rev 4 - rehayes</strong> (5 file(s) modified)</div><div>Initial Release June 16, 2009 - Bob Hayes</div>+ /cop/trunk/bench<br />+ /cop/trunk/bench/verilog<br />+ /cop/trunk/bench/verilog/timescale.v<br />+ /cop/trunk/bench/verilog/tst_bench_top.v<br />+ /cop/trunk/bench/verilog/wb_master_model.v<br /> rehayes Tue, 16 Jun 2009 20:12:28 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=4 Initial Release June 16, 2009 - Bob Hayes https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=3 <div><strong>Rev 3 - rehayes</strong> (5 file(s) modified)</div><div>Initial Release June 16, 2009 - Bob Hayes</div>+ /cop/trunk/doc<br />+ /cop/trunk/doc/COP_specs.pdf<br />+ /cop/trunk/doc/src<br />+ /cop/trunk/doc/src/COP_specs.doc<br />+ /cop/trunk/doc/src/COP_Structure.ppt<br /> rehayes Tue, 16 Jun 2009 20:10:21 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=3 Initial Release June 16, 2009 - Bob Hayes https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=2 <div><strong>Rev 2 - rehayes</strong> (6 file(s) modified)</div><div>Initial Release June 16, 2009 - Bob Hayes</div>+ /cop/trunk/rtl<br />+ /cop/trunk/rtl/verilog<br />+ /cop/trunk/rtl/verilog/cop_count.v<br />+ /cop/trunk/rtl/verilog/cop_regs.v<br />+ /cop/trunk/rtl/verilog/cop_top.v<br />+ /cop/trunk/rtl/verilog/cop_wb_bus.v<br /> rehayes Tue, 16 Jun 2009 20:07:52 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=2 The project was created and the structure was created https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=1 <div><strong>Rev 1 - root</strong> (5 file(s) modified)</div><div>The project was created and the structure was created</div>+ /cop<br />+ /cop/branches<br />+ /cop/tags<br />+ /cop/trunk<br />+ /cop/web_uploads<br /> root Sat, 23 May 2009 08:10:02 +0100 https://opencores.org/websvn//websvn/revision?repname=cop&path=%2Fcop%2Ftrunk%2F&rev=1
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