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cpu_lecture WebSVN RSS feed - cpu_lecture https://opencores.org/websvn//websvn/listing?repname=cpu_lecture&path=& Thu, 05 Dec 2019 15:30:16 +0100 FeedCreator 1.7.2 uart transmitter state handling improved https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=25 <div><strong>Rev 25 - jsauermann</strong> (2 file(s) modified)</div><div>uart transmitter state handling improved</div>~ /cpu_lecture/trunk/src/uart.vhd<br />~ /cpu_lecture/trunk/src/uart_tx.vhd<br /> jsauermann Thu, 01 Apr 2010 16:56:26 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=25 write updated SP in interrupt opcode https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=24 <div><strong>Rev 24 - jsauermann</strong> (1 file(s) modified)</div><div>write updated SP in interrupt opcode</div>~ /cpu_lecture/trunk/src/opc_deco.vhd<br /> jsauermann Mon, 08 Mar 2010 18:30:05 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=24 fixed bugs in interrupt vector https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=23 <div><strong>Rev 23 - jsauermann</strong> (2 file(s) modified)</div><div>fixed bugs in interrupt vector</div>~ /cpu_lecture/trunk/src/io.vhd<br />~ /cpu_lecture/trunk/src/opc_deco.vhd<br /> jsauermann Sun, 07 Mar 2010 15:26:37 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=23 aligned I/O port numbers to real mega8 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=22 <div><strong>Rev 22 - jsauermann</strong> (1 file(s) modified)</div><div>aligned I/O port numbers to real mega8</div>~ /cpu_lecture/trunk/src/io.vhd<br /> jsauermann Sun, 07 Mar 2010 10:11:01 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=22 fixed bug in Sign bit computation for SUB and CP ... https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=21 <div><strong>Rev 21 - jsauermann</strong> (1 file(s) modified)</div><div>fixed bug in Sign bit computation for SUB and CP ...</div>~ /cpu_lecture/trunk/src/alu.vhd<br /> jsauermann Fri, 05 Mar 2010 16:04:02 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=21 readability of 95xx instructions improved https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=20 <div><strong>Rev 20 - jsauermann</strong> (1 file(s) modified)</div><div>readability of 95xx instructions improved</div>~ /cpu_lecture/trunk/src/opc_deco.vhd<br /> jsauermann Mon, 01 Feb 2010 19:10:04 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=20 another bug in the decoding of two-cycle instructions fixed https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=19 <div><strong>Rev 19 - jsauermann</strong> (1 file(s) modified)</div><div>another bug in the decoding of two-cycle instructions fixed</div>~ /cpu_lecture/trunk/src/opc_fetch.vhd<br /> jsauermann Mon, 01 Feb 2010 19:06:05 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=19 fixed a bug that caused double execution of some 95xx ... https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=18 <div><strong>Rev 18 - jsauermann</strong> (1 file(s) modified)</div><div>fixed a bug that caused double execution of some 95xx ...</div>~ /cpu_lecture/trunk/src/opc_fetch.vhd<br /> jsauermann Fri, 29 Jan 2010 16:49:55 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=18 fixed missing carry flag for ROR instruction https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=17 <div><strong>Rev 17 - jsauermann</strong> (1 file(s) modified)</div><div>fixed missing carry flag for ROR instruction</div>~ /cpu_lecture/trunk/src/alu.vhd<br /> jsauermann Mon, 25 Jan 2010 18:41:57 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=17 fixed missing RD_M signal for IN instruction https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=16 <div><strong>Rev 16 - jsauermann</strong> (1 file(s) modified)</div><div>fixed missing RD_M signal for IN instruction</div>~ /cpu_lecture/trunk/src/opc_deco.vhd<br /> jsauermann Sat, 16 Jan 2010 17:07:41 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=16 fixed SP auto inc/dec problem https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=15 <div><strong>Rev 15 - jsauermann</strong> (3 file(s) modified)</div><div>fixed SP auto inc/dec problem</div>~ /cpu_lecture/trunk/src/common.vhd<br />~ /cpu_lecture/trunk/src/opc_deco.vhd<br />~ /cpu_lecture/trunk/src/register_file.vhd<br /> jsauermann Sat, 16 Jan 2010 15:12:28 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=15 fixed wrong Q_RSEL for LDD instruction https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=14 <div><strong>Rev 14 - jsauermann</strong> (1 file(s) modified)</div><div>fixed wrong Q_RSEL for LDD instruction</div>~ /cpu_lecture/trunk/src/opc_deco.vhd<br /> jsauermann Thu, 14 Jan 2010 18:53:35 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=14 fixed fault in LDD/STD decoding https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=13 <div><strong>Rev 13 - jsauermann</strong> (2 file(s) modified)</div><div>fixed fault in LDD/STD decoding</div>~ /cpu_lecture/trunk/src/opc_deco.vhd<br />~ /cpu_lecture/trunk/src/opc_fetch.vhd<br /> jsauermann Wed, 13 Jan 2010 18:59:59 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=13 fixed bug in decoding of I/O address for SP https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=12 <div><strong>Rev 12 - jsauermann</strong> (1 file(s) modified)</div><div>fixed bug in decoding of I/O address for SP</div>~ /cpu_lecture/trunk/src/register_file.vhd<br /> jsauermann Tue, 12 Jan 2010 18:48:59 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=12 fixed fault is BSET/BCLR instruction https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=11 <div><strong>Rev 11 - jsauermann</strong> (1 file(s) modified)</div><div>fixed fault is BSET/BCLR instruction</div>~ /cpu_lecture/trunk/src/alu.vhd<br /> jsauermann Sun, 10 Jan 2010 18:42:17 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=11 wait decoder fault fixed https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=10 <div><strong>Rev 10 - jsauermann</strong> (2 file(s) modified)</div><div>wait decoder fault fixed</div>~ /cpu_lecture/trunk/src/opc_deco.vhd<br />~ /cpu_lecture/trunk/src/opc_fetch.vhd<br /> jsauermann Sun, 10 Jan 2010 13:21:19 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=10 renamed 'main' to 'hello' in build commands https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=9 <div><strong>Rev 9 - jsauermann</strong> (1 file(s) modified)</div><div>renamed 'main' to 'hello' in build commands</div>~ /cpu_lecture/trunk/html/09_Toolchain_Setup.html<br /> jsauermann Sat, 09 Jan 2010 17:11:29 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=9 picture quality slightly improved https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=8 <div><strong>Rev 8 - jsauermann</strong> (1 file(s) modified)</div><div>picture quality slightly improved</div>~ /cpu_lecture/trunk/doc/lecture.pdf<br /> jsauermann Sat, 09 Jan 2010 12:29:02 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=8 support multiple port sizes in make_mem https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=7 <div><strong>Rev 7 - jsauermann</strong> (1 file(s) modified)</div><div>support multiple port sizes in make_mem</div>+ /cpu_lecture/trunk/gtkwave.save<br /> jsauermann Sat, 09 Jan 2010 11:15:01 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=7 support multiple port sizes in make_mem https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=6 <div><strong>Rev 6 - jsauermann</strong> (2 file(s) modified)</div><div>support multiple port sizes in make_mem</div>~ /cpu_lecture/trunk/src/prog_mem.vhd<br />~ /cpu_lecture/trunk/src/prog_mem_content.vhd<br /> jsauermann Sat, 09 Jan 2010 10:59:56 +0100 https://opencores.org/websvn//websvn/revision?repname=cpu_lecture&path=%2F&rev=6
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