OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Error creating feed file, please check write permissions.
ethmac WebSVN RSS feed - ethmac https://opencores.org/websvn//websvn/listing?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F& Tue, 19 Mar 2024 05:50:32 +0100 FeedCreator 1.7.2 ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=338 <div><strong>Rev 338 - root</strong> (2 file(s) modified)</div><div>...</div>- /ethernet<br />+ /ethmac<br /> root Tue, 05 May 2009 15:18:25 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=338 New directory structure. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=335 <div><strong>Rev 335 - root</strong> (8 file(s) modified)</div><div>New directory structure.</div>- /branches<br />+ /ethernet<br />+ /ethernet/branches<br />+ /ethernet/tags<br />+ /ethernet/trunk<br />+ /ethernet/web_uploads<br />- /tags<br />- /trunk<br /> root Mon, 09 Mar 2009 10:03:10 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=335 This commit was manufactured by cvs2svn to create tag 'rel_14'. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=271 <div><strong>Rev 271 - </strong> (1 file(s) modified)</div><div>This commit was manufactured by cvs2svn to create tag 'rel_14'.</div>+ /tags/rel_14<br /> Tue, 21 Jan 2003 12:09:41 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=271 When receiving normal data frame and RxFlow control was switched ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=270 <div><strong>Rev 270 - mohor</strong> (2 file(s) modified)</div><div>When receiving normal data frame and RxFlow control was switched ...</div>~ /trunk/rtl/verilog/eth_top.v<br />~ /trunk/rtl/verilog/eth_wishbone.v<br /> mohor Tue, 21 Jan 2003 12:09:40 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=270 When in full duplex, transmit was sometimes blocked. Fixed. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=269 <div><strong>Rev 269 - mohor</strong> (1 file(s) modified)</div><div>When in full duplex, transmit was sometimes blocked. Fixed.</div>~ /trunk/rtl/verilog/eth_wishbone.v<br /> mohor Mon, 20 Jan 2003 12:05:26 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=269 Release 1.19. Control frame description changed. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=268 <div><strong>Rev 268 - mohor</strong> (2 file(s) modified)</div><div>Release 1.19. Control frame description changed.</div>~ /trunk/doc/eth_speci.pdf<br />~ /trunk/doc/src/eth_speci.doc<br /> mohor Wed, 27 Nov 2002 18:46:16 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=268 Full duplex control frames tested. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=267 <div><strong>Rev 267 - mohor</strong> (1 file(s) modified)</div><div>Full duplex control frames tested.</div>~ /trunk/bench/verilog/tb_ethernet.v<br /> mohor Wed, 27 Nov 2002 16:21:55 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=267 Flow control test almost finished. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=266 <div><strong>Rev 266 - mohor</strong> (1 file(s) modified)</div><div>Flow control test almost finished.</div>~ /trunk/bench/verilog/tb_ethernet.v<br /> mohor Fri, 22 Nov 2002 17:29:42 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=266 Registers RxStatusWrite_rck and RxStatusWriteLatched were not used anywhere. Removed. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=264 <div><strong>Rev 264 - mohor</strong> (1 file(s) modified)</div><div>Registers RxStatusWrite_rck and RxStatusWriteLatched were not used<br /> anywhere. Removed.</div>~ /trunk/rtl/verilog/eth_wishbone.v<br /> mohor Fri, 22 Nov 2002 13:26:21 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=264 test_mac_full_duplex_flow_control tests pretty much finished. TEST 0: INSERT CONTROL FRM. WHILE ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=263 <div><strong>Rev 263 - mohor</strong> (1 file(s) modified)</div><div>test_mac_full_duplex_flow_control tests pretty much finished.<br /> TEST 0: INSERT CONTROL FRM. WHILE ...</div>~ /trunk/bench/verilog/tb_ethernet.v<br /> mohor Fri, 22 Nov 2002 02:12:16 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=263 Version 1.18 released. MIIMRST (Reset of the MIIM module) not used ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=262 <div><strong>Rev 262 - mohor</strong> (2 file(s) modified)</div><div>Version 1.18 released.<br /> MIIMRST (Reset of the MIIM module) not used ...</div>~ /trunk/doc/eth_speci.pdf<br />~ /trunk/doc/src/eth_speci.doc<br /> mohor Fri, 22 Nov 2002 02:00:52 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=262 Rx Flow control fixed. CF flag added to the RX ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=261 <div><strong>Rev 261 - mohor</strong> (8 file(s) modified)</div><div>Rx Flow control fixed. CF flag added to the RX ...</div>~ /trunk/rtl/verilog/eth_maccontrol.v<br />~ /trunk/rtl/verilog/eth_macstatus.v<br />~ /trunk/rtl/verilog/eth_receivecontrol.v<br />~ /trunk/rtl/verilog/eth_registers.v<br />~ /trunk/rtl/verilog/eth_rxaddrcheck.v<br />~ /trunk/rtl/verilog/eth_rxethmac.v<br />~ /trunk/rtl/verilog/eth_top.v<br />~ /trunk/rtl/verilog/eth_wishbone.v<br /> mohor Fri, 22 Nov 2002 01:57:06 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=261 test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame finished. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=260 <div><strong>Rev 260 - mohor</strong> (1 file(s) modified)</div><div>test_mac_full_duplex_flow test 0 finished. Sending the control (PAUSE) frame<br /> finished.</div>~ /trunk/bench/verilog/tb_ethernet.v<br /> mohor Thu, 21 Nov 2002 13:56:50 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=260 In loopback rx_clk is not looped back. Possible CRC error. ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=259 <div><strong>Rev 259 - mohor</strong> (1 file(s) modified)</div><div>In loopback rx_clk is not looped back. Possible CRC error. ...</div>~ /trunk/rtl/verilog/TODO<br /> mohor Thu, 21 Nov 2002 00:33:32 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=259 When TxUsedData and CtrlMux occur at the same time, byte ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=257 <div><strong>Rev 257 - mohor</strong> (1 file(s) modified)</div><div>When TxUsedData and CtrlMux occur at the same time, byte ...</div>~ /trunk/rtl/verilog/eth_transmitcontrol.v<br /> mohor Thu, 21 Nov 2002 00:16:14 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=257 TxDone and TxAbort changed so they're not propagated to the ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=256 <div><strong>Rev 256 - mohor</strong> (1 file(s) modified)</div><div>TxDone and TxAbort changed so they're not propagated to the ...</div>~ /trunk/rtl/verilog/eth_maccontrol.v<br /> mohor Thu, 21 Nov 2002 00:14:39 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=256 TPauseRq synchronized to tx_clk. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=255 <div><strong>Rev 255 - mohor</strong> (1 file(s) modified)</div><div>TPauseRq synchronized to tx_clk.</div>~ /trunk/rtl/verilog/eth_top.v<br /> mohor Thu, 21 Nov 2002 00:09:19 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=255 Temp version. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=254 <div><strong>Rev 254 - mohor</strong> (2 file(s) modified)</div><div>Temp version.</div>~ /trunk/bench/verilog/tb_ethernet.v<br />~ /trunk/bench/verilog/tb_eth_defines.v<br /> mohor Tue, 19 Nov 2002 20:27:46 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=254 r_MiiMRst is not used for resetting the MIIM module. wb_rst ... https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=253 <div><strong>Rev 253 - mohor</strong> (3 file(s) modified)</div><div>r_MiiMRst is not used for resetting the MIIM module. wb_rst ...</div>~ /trunk/rtl/verilog/eth_defines.v<br />~ /trunk/rtl/verilog/eth_registers.v<br />~ /trunk/rtl/verilog/eth_top.v<br /> mohor Tue, 19 Nov 2002 18:13:49 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=253 Just some updates. https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=252 <div><strong>Rev 252 - tadejm</strong> (1 file(s) modified)</div><div>Just some updates.</div>~ /trunk/bench/verilog/tb_ethernet.v<br /> tadejm Tue, 19 Nov 2002 17:41:19 +0100 https://opencores.org/websvn//websvn/revision?repname=ethmac&path=%2Fethmac%2Ftags%2Frel_14%2F&rev=252
© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.