URL
https://opencores.org/ocsvn/ft816float/ft816float/trunk
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ft816float
WebSVN RSS feed - ft816float
https://opencores.org/websvn//websvn/listing?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&
Fri, 06 Mar 2026 11:05:28 +0100
FeedCreator 1.7.2
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- cntlz added cntlz192
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=63
<div><strong>Rev 63 - robfinch</strong> (1 file(s) modified)</div><div>- cntlz added cntlz192</div>+ /ft816float/trunk/rtl/verilog/lib/cntlz.sv<br />
robfinch
Mon, 21 Feb 2022 07:23:21 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=63
-
- vtdl.v
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=61
<div><strong>Rev 61 - robfinch</strong> (1 file(s) modified)</div><div>- vtdl.v</div>+ /ft816float/trunk/rtl/verilog/lib/vtdl.v<br />
robfinch
Mon, 21 Feb 2022 05:14:42 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=61
-
- allow restart of sqrt calc if load signal activated
-
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=28
<div><strong>Rev 28 - robfinch</strong> (9 file(s) modified)</div><div>- allow restart of sqrt calc if load signal activated<br />
-</div>~ /ft816float/trunk/rtl/verilog/fpSqrt.v<br />~ /ft816float/trunk/rtl/verilog/isqrt.v<br />+ /ft816float/trunk/test_bench/fpSqrt_tb.v<br />+ /ft816float/trunk/test_bench/fpSqrt_tv.txt<br />+ /ft816float/trunk/test_bench/fpSqrt_tvd.txt<br />+ /ft816float/trunk/test_bench/fpSqrt_tvdo.txt<br />+ /ft816float/trunk/test_bench/fpSqrt_tvdx.txt<br />+ /ft816float/trunk/test_bench/fpSqrt_tvdxo.txt<br />+ /ft816float/trunk/test_bench/fpSqrt_tvo.txt<br />
robfinch
Sat, 06 Jul 2019 15:21:57 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=28
-
- transmission of Nans in normalizer
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=27
<div><strong>Rev 27 - robfinch</strong> (2 file(s) modified)</div><div>- transmission of Nans in normalizer</div>~ /ft816float/trunk/rtl/verilog/fpFMA.v<br />~ /ft816float/trunk/rtl/verilog/fpNormalize.v<br />
robfinch
Sat, 15 Jun 2019 02:26:14 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=27
-
- factor out sizes
- add leading bit for FMA normalization ...
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=26
<div><strong>Rev 26 - robfinch</strong> (27 file(s) modified)</div><div>- factor out sizes<br />
- add leading bit for FMA normalization ...</div>~ /ft816float/trunk/rtl/verilog/DivGoldschmidt.v<br />~ /ft816float/trunk/rtl/verilog/f2i.v<br />~ /ft816float/trunk/rtl/verilog/F32ToF80.v<br />~ /ft816float/trunk/rtl/verilog/fpAddsub.v<br />~ /ft816float/trunk/rtl/verilog/fpAddsub_L10.v<br />~ /ft816float/trunk/rtl/verilog/fpDecompReg.v<br />~ /ft816float/trunk/rtl/verilog/fpDiv.v<br />~ /ft816float/trunk/rtl/verilog/fpdivr2.v<br />~ /ft816float/trunk/rtl/verilog/fpdivr8.v<br />~ /ft816float/trunk/rtl/verilog/fpFMA.v<br />~ /ft816float/trunk/rtl/verilog/fpLOOUnit.v<br />~ /ft816float/trunk/rtl/verilog/fpMul.v<br />~ /ft816float/trunk/rtl/verilog/fpNormalize.v<br />~ /ft816float/trunk/rtl/verilog/fpRes.sv<br />~ /ft816float/trunk/rtl/verilog/fpRound.v<br />~ /ft816float/trunk/rtl/verilog/fpRsqrte.sv<br />~ /ft816float/trunk/rtl/verilog/fpSigmoid.v<br />+ /ft816float/trunk/rtl/verilog/fpSize.sv<br />~ /ft816float/trunk/rtl/verilog/fpSqrt.v<br />~ /ft816float/trunk/rtl/verilog/fpTrunc.sv<br />~ /ft816float/trunk/rtl/verilog/fpUnit.v<br />~ /ft816float/trunk/rtl/verilog/fpZLUnit.v<br />~ /ft816float/trunk/rtl/verilog/fp_cmp_unit.v<br />~ /ft816float/trunk/rtl/verilog/fp_decomp.v<br />~ /ft816float/trunk/rtl/verilog/fp_defines.v<br />~ /ft816float/trunk/rtl/verilog/i2f.v<br />~ /ft816float/trunk/rtl/verilog/isqrt.v<br />
robfinch
Fri, 14 Jun 2019 10:16:26 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=26
-
- FMA improved accuracy
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=25
<div><strong>Rev 25 - robfinch</strong> (2 file(s) modified)</div><div>- FMA improved accuracy</div>~ /ft816float/trunk/rtl/verilog/fpFMA.v<br />~ /ft816float/trunk/test_bench/fpFMA_tvdo.txt<br />
robfinch
Tue, 11 Jun 2019 18:27:43 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=25
-
- fix infinity
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=24
<div><strong>Rev 24 - robfinch</strong> (1 file(s) modified)</div><div>- fix infinity</div>~ /ft816float/trunk/rtl/verilog/fpAddsub.v<br />
robfinch
Tue, 11 Jun 2019 13:36:25 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=24
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- better test data for FMA
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=23
<div><strong>Rev 23 - robfinch</strong> (4 file(s) modified)</div><div>- better test data for FMA</div>~ /ft816float/trunk/rtl/verilog/fpFMA.v<br />~ /ft816float/trunk/test_bench/fpFMA_tb.v<br />~ /ft816float/trunk/test_bench/fpFMA_tvd.txt<br />~ /ft816float/trunk/test_bench/fpFMA_tvdo.txt<br />
robfinch
Tue, 11 Jun 2019 13:35:19 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=23
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- fused multiply add
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=22
<div><strong>Rev 22 - robfinch</strong> (4 file(s) modified)</div><div>- fused multiply add</div>+ /ft816float/trunk/rtl/verilog/fpFMA.v<br />+ /ft816float/trunk/test_bench/fpFMA_tb.v<br />+ /ft816float/trunk/test_bench/fpFMA_tvd.txt<br />+ /ft816float/trunk/test_bench/fpFMA_tvdo.txt<br />
robfinch
Tue, 11 Jun 2019 11:07:01 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=22
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- trunc function
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=21
<div><strong>Rev 21 - robfinch</strong> (5 file(s) modified)</div><div>- trunc function</div>+ /ft816float/trunk/rtl/verilog/fpTrunc.sv<br />~ /ft816float/trunk/rtl/verilog/fp_cmp_unit.v<br />+ /ft816float/trunk/test_bench/fpTrunc_tb.v<br />+ /ft816float/trunk/test_bench/fpTrunc_tvd.txt<br />+ /ft816float/trunk/test_bench/fpTrunc_tvdo.txt<br />
robfinch
Mon, 10 Jun 2019 22:47:14 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=21
-
- fix nan propagation
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=20
<div><strong>Rev 20 - robfinch</strong> (1 file(s) modified)</div><div>- fix nan propagation</div>~ /ft816float/trunk/rtl/verilog/fpAddsub_L10.v<br />
robfinch
Sun, 09 Jun 2019 16:23:35 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=20
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- latency 10 addsub
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=19
<div><strong>Rev 19 - robfinch</strong> (5 file(s) modified)</div><div>- latency 10 addsub</div>+ /ft816float/trunk/rtl/verilog/fpAddsub_L10.v<br />+ /ft816float/trunk/test_bench/fpAddsub_L10d_tb.v<br />+ /ft816float/trunk/test_bench/fpAddsub_L10_tb.v<br />+ /ft816float/trunk/test_bench/fpAddsub_L10_tvdo.txt<br />+ /ft816float/trunk/test_bench/fpAddsub_L10_tvo.txt<br />
robfinch
Sun, 09 Jun 2019 15:44:15 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=19
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- sigmoid function
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=18
<div><strong>Rev 18 - robfinch</strong> (1 file(s) modified)</div><div>- sigmoid function</div>+ /ft816float/trunk/rtl/verilog/fpSigmoid.v<br />
robfinch
Fri, 07 Jun 2019 21:37:52 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=18
-
- added reciprocal square root estimate
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=16
<div><strong>Rev 16 - robfinch</strong> (4 file(s) modified)</div><div>- added reciprocal square root estimate</div>+ /ft816float/trunk/rtl/verilog/F32ToF80.v<br />+ /ft816float/trunk/rtl/verilog/F80ToF32.v<br />+ /ft816float/trunk/rtl/verilog/fpRsqrte.sv<br />+ /ft816float/trunk/rtl/verilog/fp_defines.v<br />
robfinch
Fri, 07 Jun 2019 21:36:36 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=16
-
- added reciprocal estimate
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=15
<div><strong>Rev 15 - robfinch</strong> (4 file(s) modified)</div><div>- added reciprocal estimate</div>+ /ft816float/trunk/rtl/verilog/fpRes.sv<br />+ /ft816float/trunk/rtl/verilog/fpRes_tb.v<br />+ /ft816float/trunk/rtl/verilog/fpRes_tv.txt<br />+ /ft816float/trunk/rtl/verilog/fpRes_tvo.txt<br />
robfinch
Thu, 06 Jun 2019 09:36:47 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=15
-
- added Goldschmidt divider
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=14
<div><strong>Rev 14 - robfinch</strong> (7 file(s) modified)</div><div>- added Goldschmidt divider</div>+ /ft816float/trunk/rtl/verilog/DivGoldschmidt.v<br />~ /ft816float/trunk/rtl/verilog/fpDiv.v<br />+ /ft816float/trunk/rtl/verilog/fpDiv_gstvd.txt<br />+ /ft816float/trunk/rtl/verilog/fpDiv_gstvdo.txt<br />+ /ft816float/trunk/rtl/verilog/fpDiv_gstvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpDiv_tb.v<br />~ /ft816float/trunk/rtl/verilog/fpNormalize.v<br />
robfinch
Wed, 10 Oct 2018 11:45:39 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=14
-
- fix sticky bit position
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=13
<div><strong>Rev 13 - robfinch</strong> (8 file(s) modified)</div><div>- fix sticky bit position</div>~ /ft816float/trunk/rtl/verilog/fpAddsub_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpDiv.v<br />~ /ft816float/trunk/rtl/verilog/fpDiv_tvdo.txt<br />~ /ft816float/trunk/rtl/verilog/fpDiv_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpMul_tvdo.txt<br />~ /ft816float/trunk/rtl/verilog/fpMul_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpNormalize.v<br />~ /ft816float/trunk/rtl/verilog/fpRound.v<br />
robfinch
Fri, 09 Feb 2018 10:10:45 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=13
-
- added square root
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=12
<div><strong>Rev 12 - robfinch</strong> (12 file(s) modified)</div><div>- added square root</div>+ /ft816float/trunk/rtl/verilog/fpDiv_tvd.txt<br />+ /ft816float/trunk/rtl/verilog/fpDiv_tvdo.txt<br />+ /ft816float/trunk/rtl/verilog/fpMul_tvd.txt<br />+ /ft816float/trunk/rtl/verilog/fpMul_tvdo.txt<br />~ /ft816float/trunk/rtl/verilog/fpNormalize.v<br />+ /ft816float/trunk/rtl/verilog/fpSqrt.v<br />+ /ft816float/trunk/rtl/verilog/fpSqrt_tb.v<br />+ /ft816float/trunk/rtl/verilog/fpSqrt_tv.txt<br />+ /ft816float/trunk/rtl/verilog/fpSqrt_tvd.txt<br />+ /ft816float/trunk/rtl/verilog/fpSqrt_tvdo.txt<br />+ /ft816float/trunk/rtl/verilog/fpSqrt_tvo.txt<br />+ /ft816float/trunk/rtl/verilog/isqrt.v<br />
robfinch
Wed, 07 Feb 2018 19:30:38 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=12
-
- fix multiply NaN
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=11
<div><strong>Rev 11 - robfinch</strong> (8 file(s) modified)</div><div>- fix multiply NaN</div>~ /ft816float/trunk/rtl/verilog/fpDiv_tb.v<br />~ /ft816float/trunk/rtl/verilog/fpDiv_tv.txt<br />~ /ft816float/trunk/rtl/verilog/fpDiv_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpMul.v<br />~ /ft816float/trunk/rtl/verilog/fpMul_tb.v<br />~ /ft816float/trunk/rtl/verilog/fpMul_tv.txt<br />~ /ft816float/trunk/rtl/verilog/fpMul_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpNormalize.v<br />
robfinch
Mon, 05 Feb 2018 20:07:51 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=11
-
- fp updated
- test benches and vectors
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=10
<div><strong>Rev 10 - robfinch</strong> (17 file(s) modified)</div><div>- fp updated<br />
- test benches and vectors</div>~ /ft816float/trunk/rtl/verilog/fpAddsub.v<br />+ /ft816float/trunk/rtl/verilog/fpAddsub_tb.v<br />+ /ft816float/trunk/rtl/verilog/fpAddsub_tv.txt<br />+ /ft816float/trunk/rtl/verilog/fpAddsub_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpDiv.v<br />~ /ft816float/trunk/rtl/verilog/fpdivr8.v<br />+ /ft816float/trunk/rtl/verilog/fpdivr8_tb.v<br />+ /ft816float/trunk/rtl/verilog/fpDiv_tb.v<br />+ /ft816float/trunk/rtl/verilog/fpDiv_tv.txt<br />+ /ft816float/trunk/rtl/verilog/fpDiv_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpMul.v<br />+ /ft816float/trunk/rtl/verilog/fpMul_tb.v<br />+ /ft816float/trunk/rtl/verilog/fpMul_tv.txt<br />+ /ft816float/trunk/rtl/verilog/fpMul_tvo.txt<br />~ /ft816float/trunk/rtl/verilog/fpNormalize.v<br />~ /ft816float/trunk/rtl/verilog/fpRound.v<br />~ /ft816float/trunk/rtl/verilog/fpUnit.v<br />
robfinch
Mon, 05 Feb 2018 08:43:30 +0100
https://opencores.org/websvn//websvn/revision?repname=ft816float&path=%2Fft816float%2Ftrunk%2Frtl%2Fverilog%2F&rev=10
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