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light8080 WebSVN RSS feed - light8080 https://opencores.org/websvn//websvn/listing?repname=light8080&path=%2Flight8080%2F& Wed, 19 Jun 2024 10:25:36 +0100 FeedCreator 1.7.2 removed unfinished CPM demo files https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=57 <div><strong>Rev 57 - ja_rd</strong> (3 file(s) modified)</div><div>removed unfinished CPM demo files</div>- /light8080/trunk/vhdl/demo/c2sb_cpm.csv<br />- /light8080/trunk/vhdl/demo/c2sb_cpm_cpu.vhdl<br />- /light8080/trunk/vhdl/demo/c2sb_cpm_rom.vhdl<br /> ja_rd Sat, 10 Jul 2010 20:44:52 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=57 file list updated https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=56 <div><strong>Rev 56 - ja_rd</strong> (1 file(s) modified)</div><div>file list updated</div>~ /light8080/trunk/readme.txt<br /> ja_rd Sat, 10 Jul 2010 20:44:23 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=56 Altair 4K Basic demo on DE-1 board https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=55 <div><strong>Rev 55 - ja_rd</strong> (3 file(s) modified)</div><div>Altair 4K Basic demo on DE-1 board</div>+ /light8080/trunk/vhdl/demo/c2sb_4kbasic.csv<br />+ /light8080/trunk/vhdl/demo/c2sb_4kbasic_cpu.vhdl<br />+ /light8080/trunk/vhdl/demo/c2sb_4kbasic_rom.vhdl<br /> ja_rd Sat, 10 Jul 2010 20:42:33 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=55 BUG FIX: XOR operations wre not clearing CY and ACY https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=54 <div><strong>Rev 54 - ja_rd</strong> (1 file(s) modified)</div><div>BUG FIX: XOR operations wre not clearing CY and ACY</div>~ /light8080/trunk/vhdl/light8080.vhdl<br /> ja_rd Sat, 10 Jul 2010 20:41:39 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=54 added interrupt for single-stepping cleaned up comments a bit https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=53 <div><strong>Rev 53 - ja_rd</strong> (1 file(s) modified)</div><div>added interrupt for single-stepping<br /> cleaned up comments a bit</div>~ /light8080/trunk/vhdl/demo/c2sb_cpm_cpu.vhdl<br /> ja_rd Sun, 19 Jul 2009 20:31:37 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=53 test bench compilation script sanitized a little https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=52 <div><strong>Rev 52 - ja_rd</strong> (1 file(s) modified)</div><div>test bench compilation script sanitized a little</div>~ /light8080/trunk/asm/tasmtb.bat<br /> ja_rd Sun, 19 Jul 2009 20:29:49 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=52 interrupt test bench adapted to the fix in IE instruction https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=51 <div><strong>Rev 51 - ja_rd</strong> (1 file(s) modified)</div><div>interrupt test bench adapted to the fix in IE instruction</div>~ /light8080/trunk/asm/tb1.asm<br /> ja_rd Sun, 19 Jul 2009 20:29:16 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=51 interrupt test bench adapted to the fix in IE instruction https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=50 <div><strong>Rev 50 - ja_rd</strong> (1 file(s) modified)</div><div>interrupt test bench adapted to the fix in IE instruction</div>~ /light8080/trunk/vhdl/test/light8080_tb1.vhdl<br /> ja_rd Sun, 19 Jul 2009 20:28:51 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=50 fixed: IE now enables interrupts after a 1-instruction delay (it was ... https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=49 <div><strong>Rev 49 - ja_rd</strong> (1 file(s) modified)</div><div>fixed: IE now enables interrupts after a 1-instruction delay<br /> (it was ...</div>~ /light8080/trunk/vhdl/light8080.vhdl<br /> ja_rd Sun, 19 Jul 2009 20:27:55 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=49 clarification of some terms in the comments https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=48 <div><strong>Rev 48 - ja_rd</strong> (1 file(s) modified)</div><div>clarification of some terms in the comments</div>~ /light8080/trunk/ucode/light8080.m80<br /> ja_rd Sun, 19 Jul 2009 04:25:26 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=48 edited the file list and added a few remarks https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=47 <div><strong>Rev 47 - ja_rd</strong> (1 file(s) modified)</div><div>edited the file list and added a few remarks</div>~ /light8080/trunk/readme.txt<br /> ja_rd Sun, 19 Jul 2009 04:21:36 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=47 minor change in signal color for better readability https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=46 <div><strong>Rev 46 - ja_rd</strong> (1 file(s) modified)</div><div>minor change in signal color for better readability</div>~ /light8080/trunk/synthesis/tb1_modelsim_wave.do<br /> ja_rd Sun, 19 Jul 2009 04:12:15 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=46 Added modelsim scripts for the test benches https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=45 <div><strong>Rev 45 - ja_rd</strong> (2 file(s) modified)</div><div>Added modelsim scripts for the test benches</div>+ /light8080/trunk/synthesis/sim_tb0.do<br />+ /light8080/trunk/synthesis/sim_tb1.do<br /> ja_rd Sun, 19 Jul 2009 04:11:19 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=45 fixed error in RST test, added support for long intr ... https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=44 <div><strong>Rev 44 - ja_rd</strong> (1 file(s) modified)</div><div>fixed error in RST test, added support for long intr ...</div>~ /light8080/trunk/asm/tb1.asm<br /> ja_rd Sun, 19 Jul 2009 04:04:16 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=44 added a remark about the TASM source format https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=43 <div><strong>Rev 43 - ja_rd</strong> (1 file(s) modified)</div><div>added a remark about the TASM source format</div>~ /light8080/trunk/asm/tb0.asm<br /> ja_rd Sun, 19 Jul 2009 04:02:49 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=43 test bench 1 regenerated with new template added a test for ... https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=42 <div><strong>Rev 42 - ja_rd</strong> (1 file(s) modified)</div><div>test bench 1 regenerated with new template<br /> added a test for ...</div>~ /light8080/trunk/vhdl/test/light8080_tb1.vhdl<br /> ja_rd Sun, 19 Jul 2009 04:01:49 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=42 test bench 0 regenerated with new template no changes to the ... https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=41 <div><strong>Rev 41 - ja_rd</strong> (1 file(s) modified)</div><div>test bench 0 regenerated with new template<br /> no changes to the ...</div>~ /light8080/trunk/vhdl/test/light8080_tb0.vhdl<br /> ja_rd Sun, 19 Jul 2009 04:01:07 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=41 test bench template now can simulate intr pulses longer than ... https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=40 <div><strong>Rev 40 - ja_rd</strong> (1 file(s) modified)</div><div>test bench template now can simulate intr pulses longer than ...</div>~ /light8080/trunk/vhdl/test/tb_template.vhdl<br /> ja_rd Sun, 19 Jul 2009 04:00:32 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=40 fixed: int request (intr) can now be wider than 1 ... https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=39 <div><strong>Rev 39 - ja_rd</strong> (1 file(s) modified)</div><div>fixed: int request (intr) can now be wider than 1 ...</div>~ /light8080/trunk/vhdl/light8080.vhdl<br /> ja_rd Sun, 19 Jul 2009 03:58:40 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=39 pin assignment for IMSAI demo removed https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=38 <div><strong>Rev 38 - ja_rd</strong> (1 file(s) modified)</div><div>pin assignment for IMSAI demo removed</div>- /light8080/trunk/vhdl/demo/c2sb_demo.csv<br /> ja_rd Sun, 19 Jul 2009 03:56:54 +0100 https://opencores.org/websvn//websvn/revision?repname=light8080&path=%2Flight8080%2F&rev=38
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